# ARM processor package.\r
#\r
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h\r
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h\r
ArmGicArchLib|Include/Library/ArmGicArchLib.h\r
+ ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h\r
ArmSvcLib|Include/Library/ArmSvcLib.h\r
+ OpteeLib|Include/Library/OpteeLib.h\r
\r
[Guids.common]\r
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }\r
# Include/Guid/ArmMpCoreInfo.h\r
gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r
\r
- gArmGicDxeFileGuid = { 0xde371f7c, 0xdec4, 0x4d21, { 0xad, 0xf1, 0x59, 0x3a, 0xbc, 0xc1, 0x58, 0x82 } }\r
+[Protocols.common]\r
+ ## Arm System Control and Management Interface(SCMI) Base protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h\r
+ gArmScmiBaseProtocolGuid = { 0xd7e5abe9, 0x33ab, 0x418e, { 0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f } }\r
+\r
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h\r
+ gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }\r
+\r
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h\r
+ gArmScmiPerformanceProtocolGuid = { 0x9b8ba84, 0x3dd3, 0x49a6, { 0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad } }\r
\r
[Ppis]\r
## Include/Ppi/ArmMpCoreInfo.h\r
# Define if the GICv3 controller should use the GICv2 legacy\r
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
\r
+ # Whether to implement warm reboot for capsule update using a jump back to the\r
+ # PEI entry point with caches and interrupts disabled.\r
+ gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x0000001F\r
+\r
[PcdsFeatureFlag.ARM]\r
# Whether to map normal memory as non-shareable. FALSE is the safe choice, but\r
# TRUE may be appropriate to fix performance problems if you don't care about\r