ArmVirtPkg/QemuVirtMemInfoLib: remove 1:1 mapping of top of PA range

[mirror_edk2.git] / ArmPkg / Include / AsmMacroIoLibV8.h

diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h
index 5ab1b5723eb866fa6c796391a4c44a481edbf33b..db43d3b52e5a0ab80e509d48bef22110110f0685 100644 (file)
--- a/ArmPkg/Include/AsmMacroIoLibV8.h
+++ b/ArmPkg/Include/AsmMacroIoLibV8.h
@@ -1,8 +1,9 @@
 /** @file\r
 /** @file\r

-  Macros to work around lack of Apple support for LDR register, =expr\r
+  Macros to work around lack of Clang support for LDR register, =expr\r

 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
   Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
   Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r

+  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r

 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r


@@ -18,118 +19,45 @@
 #ifndef __MACRO_IO_LIBV8_H__\r
 #define __MACRO_IO_LIBV8_H__\r
 \r
 #ifndef __MACRO_IO_LIBV8_H__\r
 #define __MACRO_IO_LIBV8_H__\r
 \r

-#if defined (__GNUC__)\r
-\r
-#define MmioWrite32(Address, Data) \\r
-  ldr  x1, =Address ;              \\r
-  ldr  w0, =Data    ;              \\r
-  str  w0, [x1]\r
-\r
-#define MmioOr32(Address, OrData) \\r
-  ldr  x1, =Address ;             \\r
-  ldr  w2, =OrData  ;             \\r
-  ldr  w0, [x1]     ;             \\r
-  orr  w0, w0, w2   ;             \\r
-  str  w0, [x1]\r
-\r
-#define MmioAnd32(Address, AndData) \\r
-  ldr  x1, =Address ;               \\r
-  ldr  w2, =AndData ;               \\r
-  ldr  w0, [x1]     ;               \\r
-  and  w0, w0, w2   ;               \\r
-  str  w0, [x1]\r
-\r
-#define MmioAndThenOr32(Address, AndData, OrData) \\r
-  ldr  x1, =Address ;                             \\r
-  ldr  w0, [x1]     ;                             \\r
-  ldr  w2, =AndData ;                             \\r
-  and  w0, w0, w2   ;                             \\r
-  ldr  w2, =OrData  ;                             \\r
-  orr  w0, w0, w2   ;                             \\r
-  str  w0, [x1]\r
-\r
-#define MmioWriteFromReg32(Address, Reg) \\r
-  ldr  x1, =Address ;                    \\r
-  str  Reg, [x1]\r
-\r
-#define MmioRead32(Address) \\r
-  ldr  x1, =Address ;       \\r
-  ldr  w0, [x1]\r
-\r
-#define MmioReadToReg32(Address, Reg) \\r
-  ldr  x1, =Address ;                 \\r
-  ldr  Reg, [x1]\r
-\r
-#define LoadConstant(Data) \\r
-  ldr  x0, =Data\r
-\r
-#define LoadConstantToReg(Data, Reg) \\r
-  ldr  Reg, =Data\r
-\r
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1)  \\r
-  ands    Tmp, GlobalSize, #15        ;                   \\r
-  mov     Tmp1, #16                   ;                   \\r
-  sub     Tmp1, Tmp1, Tmp             ;                   \\r
-  csel    Tmp, Tmp1, Tmp, ne          ;                   \\r
-  add     GlobalSize, GlobalSize, Tmp ;                   \\r
-  sub     sp, StackTop, GlobalSize    ;                   \\r
-                                      ;                   \\r
-  mov     Tmp, sp                     ;                   \\r
-  mov     GlobalSize, #0x0            ;                   \\r
-_SetPrimaryStackInitGlobals:          ;                   \\r
-  cmp     Tmp, StackTop               ;                   \\r
-  b.eq    _SetPrimaryStackEnd         ;                   \\r
-  str     GlobalSize, [Tmp], #8       ;                   \\r
-  b       _SetPrimaryStackInitGlobals ;                   \\r
-_SetPrimaryStackEnd:\r
-\r
-// Initialize the Global Variable with '0'\r
-#define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \\r
-  and     Tmp1, GlobalSize, #15       ;             \\r
-  mov     Tmp2, #16                   ;             \\r
-  sub     Tmp2, Tmp2, Tmp1            ;             \\r
-  add     GlobalSize, GlobalSize, Tmp2 ;            \\r
-                                      ;             \\r
-  mov     Tmp1, sp                    ;             \\r
-  sub     sp, sp, GlobalSize          ;             \\r
-  mov     GlobalSize, #0x0            ;             \\r
-_InitializePrimaryStackLoop:          ;             \\r
-  mov     Tmp2, sp                    ;             \\r
-  cmp     Tmp1, Tmp2                  ;             \\r
-  bls     _InitializePrimaryStackEnd  ;             \\r
-  str     GlobalSize, [Tmp1, #-8]!    ;             \\r
-  b       _InitializePrimaryStackLoop ;             \\r
-_InitializePrimaryStackEnd:\r
-\r

 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
 // This only selects between EL1 and EL2, else we die.\r
 // Provide the Macro with a safe temp xreg to use.\r
 #define EL1_OR_EL2(SAFE_XREG)        \\r
         mrs    SAFE_XREG, CurrentEL ;\\r
         cmp    SAFE_XREG, #0x8      ;\\r
 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
 // This only selects between EL1 and EL2, else we die.\r
 // Provide the Macro with a safe temp xreg to use.\r
 #define EL1_OR_EL2(SAFE_XREG)        \\r
         mrs    SAFE_XREG, CurrentEL ;\\r
         cmp    SAFE_XREG, #0x8      ;\\r

+        b.gt   .                    ;\\r

         b.eq   2f                   ;\\r
         b.eq   2f                   ;\\r

-        cmp    SAFE_XREG, #0x4      ;\\r
-        b.ne   .                    ;// We should never get here\r
-// EL1 code starts here\r
+        cbnz   SAFE_XREG, 1f        ;\\r
+        b      .                    ;// We should never get here\r
+\r

 \r
 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
 // This only selects between EL1 and EL2 and EL3, else we die.\r
 // Provide the Macro with a safe temp xreg to use.\r
 #define EL1_OR_EL2_OR_EL3(SAFE_XREG) \\r
         mrs    SAFE_XREG, CurrentEL ;\\r
 \r
 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r
 // This only selects between EL1 and EL2 and EL3, else we die.\r
 // Provide the Macro with a safe temp xreg to use.\r
 #define EL1_OR_EL2_OR_EL3(SAFE_XREG) \\r
         mrs    SAFE_XREG, CurrentEL ;\\r

-        cmp    SAFE_XREG, #0xC      ;\\r
-        b.eq   3f                   ;\\r

         cmp    SAFE_XREG, #0x8      ;\\r
         cmp    SAFE_XREG, #0x8      ;\\r

+        b.gt   3f                   ;\\r

         b.eq   2f                   ;\\r
         b.eq   2f                   ;\\r

-        cmp    SAFE_XREG, #0x4      ;\\r
-        b.ne   .                    ;// We should never get here\r
-// EL1 code starts here\r
+        cbnz   SAFE_XREG, 1f        ;\\r
+        b      .                    ;// We should never get here\r

 \r
 \r

-#else\r
+#define _ASM_FUNC(Name, Section)    \\r
+  .global   Name                  ; \\r
+  .section  #Section, "ax"        ; \\r
+  .type     Name, %function       ; \\r
+  Name:\r

 \r
 \r

-#error RVCT AArch64 tool chain is not supported\r
+#define ASM_FUNC(Name)            _ASM_FUNC(ASM_PFX(Name), .text. ## Name)\r

 \r
 \r

-#endif // __GNUC__ \r
+#define MOV32(Reg, Val)                   \\r
+  movz      Reg, (Val) >> 16, lsl #16   ; \\r
+  movk      Reg, (Val) & 0xffff\r

 \r
 \r

-#endif // __MACRO_IO_LIBV8_H__\r
+#define MOV64(Reg, Val)                             \\r
+  movz      Reg, (Val) >> 48, lsl #48             ; \\r
+  movk      Reg, ((Val) >> 32) & 0xffff, lsl #32  ; \\r
+  movk      Reg, ((Val) >> 16) & 0xffff, lsl #16  ; \\r
+  movk      Reg, (Val) & 0xffff\r

 \r
 \r

+#endif // __MACRO_IO_LIBV8_H__\r