ArmPkg: remove ArmCpuLib header and implementations

[mirror_edk2.git] / ArmPkg / Drivers / ArmCpuLib / ArmCortexA5xLib / ArmCortexA5xLib.c

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
deleted file mode 100644 (file)
index 3d39acd..0000000
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/** @file\r
-\r
-  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
-\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-#include <Library/ArmLib.h>\r
-#include <Library/ArmCpuLib.h>\r
-#include <Library/ArmGenericTimerCounterLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-#include <Chipset/ArmCortexA5x.h>\r
-\r
-VOID\r
-ArmCpuSetup (\r
-  IN  UINTN         MpId\r
-  )\r
-{\r
-  // Check if Architectural Timer frequency is valid number (should not be 0)\r
-  ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz));\r
-  ASSERT (ArmIsArchTimerImplemented () != 0);\r
-\r
-  // Note: System Counter frequency can only be set in Secure privileged mode,\r
-  // if security extensions are implemented.\r
-  ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r
-\r
-  if (ArmIsMpCore ()) {\r
-    // Turn on SMP coherency\r
-    ArmSetCpuExCrBit (A5X_FEATURE_SMP);\r
-  }\r
-\r
-  //\r
-  // If CPU is CortexA57 r0p0 apply Errata workarounds\r
-  //\r
-  if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) ==\r
-                         ((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) {\r
-\r
-    // Errata 806969: DisableLoadStoreWB (1ULL << 49)\r
-    // Errata 813420: Execute Data Cache clean as Data Cache clean/invalidate  (1ULL << 44)\r
-    // Errata 814670: disable DMB nullification (1ULL << 58)\r
-    ArmSetCpuActlrBit ( (1ULL << 49) | (1ULL << 44) | (1ULL << 58) );\r
-  }\r
-}\r
-\r
-VOID\r
-ArmCpuSetupSmpNonSecure (\r
-  IN  UINTN         MpId\r
-  )\r
-{\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-ArmSetCpuExCrBit (\r
-  IN  UINT64    Bits\r
-  )\r
-{\r
-  UINT64 Value;\r
-  Value =  ArmReadCpuExCr ();\r
-  Value |= Bits;\r
-  ArmWriteCpuExCr (Value);\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-ArmUnsetCpuExCrBit (\r
-  IN  UINT64    Bits\r
-  )\r
-{\r
-  UINT64 Value;\r
-  Value = ArmReadCpuExCr ();\r
-  Value &= ~Bits;\r
-  ArmWriteCpuExCr (Value);\r
-}\r