#define TCR_PS_256TB (5 << 16)\r
\r
#define TCR_TG0_4KB (0 << 14)\r
+#define TCR_TG1_4KB (2 << 30)\r
\r
#define TCR_IPS_4GB (0ULL << 32)\r
#define TCR_IPS_64GB (1ULL << 32)\r
#define TCR_IPS_16TB (4ULL << 32)\r
#define TCR_IPS_256TB (5ULL << 32)\r
\r
+#define TCR_EPD1 (1 << 23)\r
\r
#define TTBR_ASID_FIELD (48)\r
#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD)\r