ARM Packages: Removed trailing spaces

[mirror_edk2.git] / ArmPkg / Include / Library / ArmLib.h

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 9694b9d06d0f9408cebe5db66abc8da72fbe721b..0bb0d4a0639a27ad716a4e1cbc55d6086d81ba14 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -123,9 +123,6 @@ typedef enum {
 #define GET_CORE_ID(MpId)     ((MpId) & ARM_CORE_MASK)\r
 #define GET_CLUSTER_ID(MpId)  (((MpId) & ARM_CLUSTER_MASK) >> 8)\r
 #define GET_MPID(ClusterId, CoreId)   (((ClusterId) << 8) | (CoreId))\r
-// Get the position of the core for the Stack Offset (4 Core per Cluster)\r
-//   Position = (ClusterId * 4) + CoreId\r
-#define GET_CORE_POS(MpId)    ((((MpId) & ARM_CLUSTER_MASK) >> 6) + ((MpId) & ARM_CORE_MASK))\r
 #define PRIMARY_CORE_ID       (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)\r
 \r
 ARM_CACHE_TYPE\r
@@ -151,43 +148,43 @@ EFIAPI
 ArmDataCachePresent (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheSize (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheAssociativity (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheLineLength (\r
   VOID\r
   );\r
-  \r
+\r
 BOOLEAN\r
 EFIAPI\r
 ArmInstructionCachePresent (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheSize (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheAssociativity (\r
   VOID\r
   );\r
-  \r
+\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheLineLength (\r
@@ -212,15 +209,9 @@ ArmReadIdPfr1 (
   VOID\r
   );\r
 \r
-UINT32\r
-EFIAPI\r
-Cp15IdCode (\r
-  VOID\r
-  );\r
-  \r
-UINT32\r
+UINTN\r
 EFIAPI\r
-Cp15CacheInfo (\r
+ArmCacheInfo (\r
   VOID\r
   );\r
 \r
@@ -320,7 +311,7 @@ EFIAPI
 ArmDisableInstructionCache (\r
   VOID\r
   );\r
-  \r
+\r
 VOID\r
 EFIAPI\r
 ArmEnableMmu (\r
@@ -404,7 +395,7 @@ EFIAPI
 ArmDisableFiq (\r
   VOID\r
   );\r
-  \r
+\r
 BOOLEAN\r
 EFIAPI\r
 ArmGetFiqState (\r
@@ -416,14 +407,14 @@ EFIAPI
 ArmInvalidateTlb (\r
   VOID\r
   );\r
-  \r
+\r
 VOID\r
 EFIAPI\r
 ArmUpdateTranslationTableEntry (\r
   IN  VOID     *TranslationTableEntry,\r
   IN  VOID     *Mva\r
   );\r
-  \r
+\r
 VOID\r
 EFIAPI\r
 ArmSetDomainAccessControl (\r
@@ -449,25 +440,13 @@ ArmConfigureMmu (
   OUT VOID                         **TranslationTableBase OPTIONAL,\r
   OUT UINTN                         *TranslationTableSize  OPTIONAL\r
   );\r
-  \r
+\r
 BOOLEAN\r
 EFIAPI\r
 ArmMmuEnabled (\r
   VOID\r
   );\r
-  \r
-VOID\r
-EFIAPI\r
-ArmSwitchProcessorMode (\r
-  IN ARM_PROCESSOR_MODE Mode\r
-  );\r
 \r
-ARM_PROCESSOR_MODE\r
-EFIAPI\r
-ArmProcessorMode (\r
-  VOID\r
-  );\r
-  \r
 VOID\r
 EFIAPI\r
 ArmEnableBranchPrediction (\r
@@ -503,13 +482,13 @@ EFIAPI
 ArmDataMemoryBarrier (\r
   VOID\r
   );\r
-  \r
+\r
 VOID\r
 EFIAPI\r
 ArmDataSyncronizationBarrier (\r
   VOID\r
   );\r
-  \r
+\r
 VOID\r
 EFIAPI\r
 ArmInstructionSynchronizationBarrier (\r
@@ -601,16 +580,28 @@ ArmEnableVFP (
   VOID\r
   );\r
 \r
+/**\r
+  Get the Secure Configuration Register value\r
+\r
+  @return   Value read from the Secure Configuration Register\r
+\r
+**/\r
 UINT32\r
 EFIAPI\r
 ArmReadScr (\r
   VOID\r
   );\r
 \r
+/**\r
+  Set the Secure Configuration Register\r
+\r
+  @param Value   Value to write to the Secure Configuration Register\r
+\r
+**/\r
 VOID\r
 EFIAPI\r
 ArmWriteScr (\r
-  IN  UINT32   SetWayFormat\r
+  IN  UINT32   Value\r
   );\r
 \r
 UINT32\r
@@ -643,4 +634,33 @@ ArmWriteHVBar (
   IN  UINTN   HypModeVectorBase\r
   );\r
 \r
+\r
+//\r
+// Helper functions for accessing CPU ACTLR\r
+//\r
+\r
+UINTN\r
+EFIAPI\r
+ArmReadCpuActlr (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCpuActlr (\r
+  IN  UINTN Val\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmSetCpuActlrBit (\r
+  IN  UINTN    Bits\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmUnsetCpuActlrBit (\r
+  IN  UINTN    Bits\r
+  );\r
+\r
 #endif // __ARM_LIB__\r