GCC_ASM_EXPORT(ArmIsMpCore)\r
GCC_ASM_EXPORT(ArmCallWFI)\r
GCC_ASM_EXPORT(ArmReadMpidr)\r
-GCC_ASM_EXPORT(ArmReadMidr)\r
GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)\r
GCC_ASM_EXPORT(ArmEnableFiq)\r
GCC_ASM_EXPORT(ArmDisableFiq)\r
mrc p15, 0, r0, c0, c0, 5 @ read MPIDR\r
bx lr\r
\r
-ASM_PFX(ArmReadMpidr):\r
- mrc p15, 0, r0, c0, c0, 0 @ Read Main ID Register\r
- bx lr\r
-\r
ASM_PFX(ArmEnableFiq):\r
mrs R0,CPSR\r
bic R0,R0,#0x40 @Enable FIQ interrupts\r