ArmPlatformPkg: remove ArmVExpressPkg

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressLibRTSM / Arm / RTSMHelper.asm

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
deleted file mode 100644 (file)
index 66068e6..0000000
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
+++ /dev/null
@@ -1,118 +0,0 @@
-//\r
-//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-//\r
-//  This program and the accompanying materials\r
-//  are licensed and made available under the terms and conditions of the BSD License\r
-//  which accompanies this distribution.  The full text of the license may be found at\r
-//  http://opensource.org/licenses/bsd-license.php\r
-//\r
-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <Base.h>\r
-#include <Library/ArmLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-#include <Chipset/ArmCortexA9.h>\r
-\r
-#include <AutoGen.h>\r
-\r
-  INCLUDE AsmMacroIoLib.inc\r
-\r
-  EXPORT    ArmPlatformPeiBootAction\r
-  EXPORT    ArmGetCpuCountPerCluster\r
-  EXPORT    ArmPlatformIsPrimaryCore\r
-  EXPORT    ArmPlatformGetPrimaryCoreMpId\r
-  EXPORT    ArmPlatformGetCorePosition\r
-\r
-  AREA RTSMHelper, CODE, READONLY\r
-\r
-ArmPlatformPeiBootAction FUNCTION\r
-  bx    lr\r
-  ENDFUNC\r
-\r
-// IN None\r
-// OUT r0 = SCU Base Address\r
-ArmGetScuBaseAddress FUNCTION\r
-  // Read Configuration Base Address Register. ArmCBar cannot be called to get\r
-  // the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
-  // offset 0x0000 from the Private Memory Region.\r
-  mrc   p15, 4, r0, c15, c0, 0\r
-  bx  lr\r
-  ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformGetPrimaryCoreMpId (\r
-//  VOID\r
-//  );\r
-ArmPlatformGetPrimaryCoreMpId FUNCTION\r
-  mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)\r
-  bx    lr\r
-  ENDFUNC\r
-\r
-// IN None\r
-// OUT r0 = number of cores present in the system\r
-ArmGetCpuCountPerCluster FUNCTION\r
-  stmfd SP!, {r1-r2}\r
-\r
-  // Read CP15 MIDR\r
-  mrc   p15, 0, r1, c0, c0, 0\r
-\r
-  // Check if the CPU is A15\r
-  mov   r1, r1, LSR #4\r
-  mov   r0, #ARM_CPU_TYPE_MASK\r
-  and   r1, r1, r0\r
-\r
-  mov   r0, #ARM_CPU_TYPE_A15\r
-  cmp   r1, r0\r
-  beq   _Read_cp15_reg\r
-\r
-_CPU_is_not_A15\r
-  mov   r2, lr                              ; Save link register\r
-  bl    ArmGetScuBaseAddress                ; Read SCU Base Address\r
-  mov   lr, r2                              ; Restore link register val\r
-  ldr   r0, [r0, #A9_SCU_CONFIG_OFFSET]     ; Read SCU Config reg to get CPU count\r
-  b     _Return\r
-\r
-_Read_cp15_reg\r
-  mrc   p15, 1, r0, c9, c0, 2            ; Read C9 register of CP15 to get CPU count\r
-  lsr   r0, #24\r
-\r
-\r
-_Return\r
-  and   r0, r0, #3\r
-  // Add '1' to the number of CPU on the Cluster\r
-  add   r0, r0, #1\r
-  ldmfd SP!, {r1-r2}\r
-  bx lr\r
-  ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformIsPrimaryCore (\r
-//  IN UINTN MpId\r
-//  );\r
-ArmPlatformIsPrimaryCore FUNCTION\r
-  mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)\r
-  and   r0, r0, r1\r
-  mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)\r
-  ldr   r1, [r1]\r
-  cmp   r0, r1\r
-  moveq r0, #1\r
-  movne r0, #0\r
-  bx    lr\r
-  ENDFUNC\r
-\r
-//UINTN\r
-//ArmPlatformGetCorePosition (\r
-//  IN UINTN MpId\r
-//  );\r
-ArmPlatformGetCorePosition FUNCTION\r
-  and   r1, r0, #ARM_CORE_MASK\r
-  and   r0, r0, #ARM_CLUSTER_MASK\r
-  add   r0, r1, r0, LSR #7\r
-  bx    lr\r
-  ENDFUNC\r
-\r
-  END\r