--- /dev/null
+/** @file\r
+\r
+ ARM Mali DP 500/550/650 display controller driver\r
+\r
+ Copyright (c) 2017-2018, Arm Limited. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/LcdHwLib.h>\r
+#include <Library/LcdPlatformLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+\r
+#include "ArmMaliDp.h"\r
+\r
+// CORE_ID of the MALI DP\r
+STATIC UINT32 mDpDeviceId;\r
+\r
+/** Disable the graphics layer\r
+\r
+ This is done by clearing the EN bit of the LG_CONTROL register.\r
+**/\r
+STATIC\r
+VOID\r
+LayerGraphicsDisable (VOID)\r
+{\r
+ MmioAnd32 (DP_BASE + DP_DE_LG_CONTROL, ~DP_DE_LG_ENABLE);\r
+}\r
+\r
+/** Enable the graphics layer\r
+\r
+ This is done by setting the EN bit of the LG_CONTROL register.\r
+**/\r
+STATIC\r
+VOID\r
+LayerGraphicsEnable (VOID)\r
+{\r
+ MmioOr32 (DP_BASE + DP_DE_LG_CONTROL, DP_DE_LG_ENABLE);\r
+}\r
+\r
+/** Set the frame address of the graphics layer.\r
+\r
+ @param[in] FrameBaseAddress Address of the data buffer to be used as\r
+ a framebuffer.\r
+**/\r
+STATIC\r
+VOID\r
+LayerGraphicsSetFrame (\r
+ IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
+ )\r
+{\r
+ // Disable the graphics layer.\r
+ LayerGraphicsDisable ();\r
+\r
+ // Set up memory address of the data buffer for graphics layer.\r
+ // write lower bits of the address.\r
+ MmioWrite32 (\r
+ DP_BASE + DP_DE_LG_PTR_LOW,\r
+ DP_DE_LG_PTR_LOW_MASK & FrameBaseAddress\r
+ );\r
+\r
+ // Write higher bits of the address.\r
+ MmioWrite32 (\r
+ DP_BASE + DP_DE_LG_PTR_HIGH,\r
+ (UINT32)(FrameBaseAddress >> DP_DE_LG_PTR_HIGH_SHIFT)\r
+ );\r
+\r
+ // Enable the graphics layer.\r
+ LayerGraphicsEnable ();\r
+}\r
+\r
+/** Configures various graphics layer characteristics.\r
+\r
+ @param[in] UefiGfxPixelFormat This must be either\r
+ PixelBlueGreenRedReserved8BitPerColor\r
+ OR\r
+ PixelRedGreenBlueReserved8BitPerColor\r
+ @param[in] HRes Horizontal resolution of the graphics layer.\r
+ @param[in] VRes Vertical resolution of the graphics layer.\r
+**/\r
+STATIC\r
+VOID\r
+LayerGraphicsConfig (\r
+ IN CONST EFI_GRAPHICS_PIXEL_FORMAT UefiGfxPixelFormat,\r
+ IN CONST UINT32 HRes,\r
+ IN CONST UINT32 VRes\r
+ )\r
+{\r
+ UINT32 PixelFormat;\r
+\r
+ // Disable the graphics layer before configuring any settings.\r
+ LayerGraphicsDisable ();\r
+\r
+ // Setup graphics layer size.\r
+ MmioWrite32 (DP_BASE + DP_DE_LG_IN_SIZE, FRAME_IN_SIZE (HRes, VRes));\r
+\r
+ // Setup graphics layer composition size.\r
+ MmioWrite32 (DP_BASE + DP_DE_LG_CMP_SIZE, FRAME_CMP_SIZE (HRes, VRes));\r
+\r
+ // Setup memory stride (total visible pixels on a line * 4).\r
+ MmioWrite32 (DP_BASE + DP_DE_LG_H_STRIDE, (HRes * sizeof (UINT32)));\r
+\r
+ // Set the format.\r
+\r
+ // In PixelBlueGreenRedReserved8BitPerColor format, byte 0 represents blue,\r
+ // byte 1 represents green, byte 2 represents red, and byte 3 is reserved\r
+ // which is equivalent to XRGB format of the DP500/DP550/DP650. Whereas\r
+ // PixelRedGreenBlueReserved8BitPerColor is equivalent to XBGR of the\r
+ // DP500/DP550/DP650.\r
+ if (UefiGfxPixelFormat == PixelBlueGreenRedReserved8BitPerColor) {\r
+ PixelFormat = (mDpDeviceId == MALIDP_500) ? DP_PIXEL_FORMAT_DP500_XRGB_8888\r
+ : DP_PIXEL_FORMAT_XRGB_8888;\r
+ } else {\r
+ PixelFormat = (mDpDeviceId == MALIDP_500) ? DP_PIXEL_FORMAT_DP500_XBGR_8888\r
+ : DP_PIXEL_FORMAT_XBGR_8888;\r
+ }\r
+\r
+ MmioWrite32 (DP_BASE + DP_DE_LG_FORMAT, PixelFormat);\r
+\r
+ // Enable graphics layer.\r
+ LayerGraphicsEnable ();\r
+}\r
+\r
+/** Configure timing information of the display.\r
+\r
+ @param[in] Horizontal Pointer to horizontal timing parameters.\r
+ (Resolution, Sync, Back porch, Front porch)\r
+ @param[in] Vertical Pointer to vertical timing parameters.\r
+ (Resolution, Sync, Back porch, Front porch)\r
+**/\r
+STATIC\r
+VOID\r
+SetDisplayEngineTiming (\r
+ IN CONST SCAN_TIMINGS * CONST Horizontal,\r
+ IN CONST SCAN_TIMINGS * CONST Vertical\r
+ )\r
+{\r
+ UINTN RegHIntervals;\r
+ UINTN RegVIntervals;\r
+ UINTN RegSyncControl;\r
+ UINTN RegHVActiveSize;\r
+\r
+ if (mDpDeviceId == MALIDP_500) {\r
+ // MALI DP500 timing registers.\r
+ RegHIntervals = DP_BASE + DP_DE_DP500_H_INTERVALS;\r
+ RegVIntervals = DP_BASE + DP_DE_DP500_V_INTERVALS;\r
+ RegSyncControl = DP_BASE + DP_DE_DP500_SYNC_CONTROL;\r
+ RegHVActiveSize = DP_BASE + DP_DE_DP500_HV_ACTIVESIZE;\r
+ } else {\r
+ // MALI DP550/DP650 timing registers.\r
+ RegHIntervals = DP_BASE + DP_DE_H_INTERVALS;\r
+ RegVIntervals = DP_BASE + DP_DE_V_INTERVALS;\r
+ RegSyncControl = DP_BASE + DP_DE_SYNC_CONTROL;\r
+ RegHVActiveSize = DP_BASE + DP_DE_HV_ACTIVESIZE;\r
+ }\r
+\r
+ // Horizontal back porch and front porch.\r
+ MmioWrite32 (\r
+ RegHIntervals,\r
+ H_INTERVALS (Horizontal->FrontPorch, Horizontal->BackPorch)\r
+ );\r
+\r
+ // Vertical back porch and front porch.\r
+ MmioWrite32 (\r
+ RegVIntervals,\r
+ V_INTERVALS (Vertical->FrontPorch, Vertical->BackPorch)\r
+ );\r
+\r
+ // Sync control, Horizontal and Vertical sync.\r
+ MmioWrite32 (\r
+ RegSyncControl,\r
+ SYNC_WIDTH (Horizontal->Sync, Vertical->Sync)\r
+ );\r
+\r
+ // Set up Horizontal and Vertical area size.\r
+ MmioWrite32 (\r
+ RegHVActiveSize,\r
+ HV_ACTIVE (Horizontal->Resolution, Vertical->Resolution)\r
+ );\r
+}\r
+\r
+/** Return CORE_ID of the ARM Mali DP.\r
+\r
+ @retval 0xFFF No Mali DP found.\r
+ @retval 0x500 Mali DP core id for DP500.\r
+ @retval 0x550 Mali DP core id for DP550.\r
+ @retval 0x650 Mali DP core id for DP650.\r
+**/\r
+STATIC\r
+UINT32\r
+ArmMaliDpGetCoreId (\r
+ )\r
+{\r
+ UINT32 DpCoreId;\r
+\r
+ // First check for DP500 as register offset for DP550/DP650 CORE_ID\r
+ // is beyond 3K/4K register space of the DP500.\r
+ DpCoreId = MmioRead32 (DP_BASE + DP_DE_DP500_CORE_ID);\r
+ DpCoreId >>= DP_DE_DP500_CORE_ID_SHIFT;\r
+\r
+ if (DpCoreId == MALIDP_500) {\r
+ return DpCoreId;\r
+ }\r
+\r
+ // Check for DP550 or DP650.\r
+ DpCoreId = MmioRead32 (DP_BASE + DP_DC_CORE_ID);\r
+ DpCoreId >>= DP_DC_CORE_ID_SHIFT;\r
+\r
+ if ((DpCoreId == MALIDP_550) || (DpCoreId == MALIDP_650)) {\r
+ return DpCoreId;\r
+ }\r
+\r
+ return MALIDP_NOT_PRESENT;\r
+}\r
+\r
+/** Check for presence of MALI.\r
+\r
+ This function returns success if the platform implements\r
+ DP500/DP550/DP650 ARM Mali display processor.\r
+\r
+ @retval EFI_SUCCESS DP500/DP550/DP650 display processor found\r
+ on the platform.\r
+ @retval EFI_NOT_FOUND DP500/DP550/DP650 display processor not found\r
+ on the platform.\r
+**/\r
+EFI_STATUS\r
+LcdIdentify (VOID)\r
+{\r
+ DEBUG ((DEBUG_WARN,\r
+ "Probing ARM Mali DP500/DP550/DP650 at base address 0x%p\n",\r
+ DP_BASE\r
+ ));\r
+\r
+ if (mDpDeviceId == 0) {\r
+ mDpDeviceId = ArmMaliDpGetCoreId ();\r
+ }\r
+\r
+ if (mDpDeviceId == MALIDP_NOT_PRESENT) {\r
+ DEBUG ((DEBUG_WARN, "ARM Mali DP not found...\n"));\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ DEBUG ((DEBUG_WARN, "Found ARM Mali DP %x\n", mDpDeviceId));\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/** Initialize platform display.\r
+\r
+ @param[in] FrameBaseAddress Address of the frame buffer.\r
+\r
+ @retval EFI_SUCCESS Display initialization successful.\r
+ @retval !(EFI_SUCCESS) Display initialization failure.\r
+**/\r
+EFI_STATUS\r
+LcdInitialize (\r
+ IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
+ )\r
+{\r
+ DEBUG ((DEBUG_WARN, "Framebuffer base address = %p\n", FrameBaseAddress));\r
+\r
+ if (mDpDeviceId == 0) {\r
+ mDpDeviceId = ArmMaliDpGetCoreId ();\r
+ }\r
+\r
+ if (mDpDeviceId == MALIDP_NOT_PRESENT) {\r
+ DEBUG ((DEBUG_ERROR, "ARM Mali DP initialization failed,"\r
+ "no ARM Mali DP present\n"));\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ // We are using graphics layer of the Mali DP as a main framebuffer.\r
+ LayerGraphicsSetFrame (FrameBaseAddress);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/** Set ARM Mali DP in cofiguration mode.\r
+\r
+ The ARM Mali DP must be in the configuration mode for\r
+ configuration of the H_INTERVALS, V_INTERVALS, SYNC_CONTROL\r
+ and HV_ACTIVESIZE.\r
+**/\r
+STATIC\r
+VOID\r
+SetConfigurationMode (VOID)\r
+{\r
+ // Request configuration Mode.\r
+ if (mDpDeviceId == MALIDP_500) {\r
+ MmioOr32 (DP_BASE + DP_DE_DP500_CONTROL, DP_DE_DP500_CONTROL_CONFIG_REQ);\r
+ } else {\r
+ MmioOr32 (DP_BASE + DP_DC_CONTROL, DP_DC_CONTROL_CM_ACTIVE);\r
+ }\r
+}\r
+\r
+/** Set ARM Mali DP in normal mode.\r
+\r
+ Normal mode is the main operating mode of the display processor\r
+ in which display layer data is fetched from framebuffer and\r
+ displayed.\r
+**/\r
+STATIC\r
+VOID\r
+SetNormalMode (VOID)\r
+{\r
+ // Disable configuration Mode.\r
+ if (mDpDeviceId == MALIDP_500) {\r
+ MmioAnd32 (DP_BASE + DP_DE_DP500_CONTROL, ~DP_DE_DP500_CONTROL_CONFIG_REQ);\r
+ } else {\r
+ MmioAnd32 (DP_BASE + DP_DC_CONTROL, ~DP_DC_CONTROL_CM_ACTIVE);\r
+ }\r
+}\r
+\r
+/** Set the global configuration valid flag.\r
+\r
+ Any new configuration parameters written to the display engine are not\r
+ activated until the global configuration valid flag is set in the\r
+ CONFIG_VALID register.\r
+**/\r
+STATIC\r
+VOID\r
+SetConfigValid (VOID)\r
+{\r
+ if (mDpDeviceId == MALIDP_500) {\r
+ MmioOr32 (DP_BASE + DP_DP500_CONFIG_VALID, DP_DC_CONFIG_VALID);\r
+ } else {\r
+ MmioOr32 (DP_BASE + DP_DC_CONFIG_VALID, DP_DC_CONFIG_VALID);\r
+ }\r
+}\r
+\r
+/** Set requested mode of the display.\r
+\r
+ @param[in] ModeNumber Display mode number.\r
+\r
+ @retval EFI_SUCCESS Display mode set successful.\r
+ @retval EFI_DEVICE_ERROR Display mode not found/supported.\r
+**/\r
+EFI_STATUS\r
+LcdSetMode (\r
+ IN CONST UINT32 ModeNumber\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ SCAN_TIMINGS *Horizontal;\r
+ SCAN_TIMINGS *Vertical;\r
+\r
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;\r
+\r
+ // Get the display mode timings and other relevant information.\r
+ Status = LcdPlatformGetTimings (\r
+ ModeNumber,\r
+ &Horizontal,\r
+ &Vertical\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ ASSERT_EFI_ERROR (Status);\r
+ return Status;\r
+ }\r
+\r
+ ASSERT (Horizontal != NULL);\r
+ ASSERT (Vertical != NULL);\r
+\r
+ // Get the pixel format information.\r
+ Status = LcdPlatformQueryMode (ModeNumber, &ModeInfo);\r
+ if (EFI_ERROR (Status)) {\r
+ ASSERT_EFI_ERROR (Status);\r
+ return Status;\r
+ }\r
+\r
+ // Request configuration mode.\r
+ SetConfigurationMode ();\r
+\r
+ // Configure the graphics layer.\r
+ LayerGraphicsConfig (\r
+ ModeInfo.PixelFormat,\r
+ Horizontal->Resolution,\r
+ Vertical->Resolution\r
+ );\r
+\r
+ // Set the display engine timings.\r
+ SetDisplayEngineTiming (Horizontal, Vertical);\r
+\r
+ // After configuration, set Mali DP in normal mode.\r
+ SetNormalMode ();\r
+\r
+ // Any parameters written to the display engine are not activated until\r
+ // CONFIG_VALID is set.\r
+ SetConfigValid ();\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/** This function de-initializes the display.\r
+\r
+**/\r
+VOID\r
+LcdShutdown (VOID)\r
+{\r
+ // Disable graphics layer.\r
+ LayerGraphicsDisable ();\r
+}\r
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