--- /dev/null
+//\r
+// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+// \r
+// This program and the accompanying materials \r
+// are licensed and made available under the terms and conditions of the BSD License \r
+// which accompanies this distribution. The full text of the license may be found at \r
+// http://opensource.org/licenses/bsd-license.php \r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ IMPORT ArmReadMpidr\r
+ EXPORT _ModuleEntryPoint\r
+ \r
+ PRESERVE8\r
+ AREA PrePeiCoreEntryPoint, CODE, READONLY\r
+ \r
+StartupAddr DCD CEntryPoint\r
+\r
+_ModuleEntryPoint\r
+ // Identify CPU ID\r
+ bl ArmReadMpidr\r
+ // Get ID of this CPU in Multicore system\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
+ and r5, r0, r1\r
+ \r
+ // Get the top of the primary stacks (and the base of the secondary stacks)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ add r1, r1, r2\r
+\r
+ // Is it the Primary Core ?\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)\r
+ cmp r5, r3\r
+ beq _SetupPrimaryCoreStack\r
+\r
+_SetupSecondaryCoreStack\r
+ // r1 contains the base of the secondary stacks\r
+\r
+ // Get the Core Position (ClusterId * 4) + CoreId\r
+ GetCorePositionFromMpId(r0, r5, r2)\r
+ // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
+ add r0, r0, #1\r
+\r
+ // StackOffset = CorePos * StackSize\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
+ mul r0, r0, r2\r
+ // SP = StackBase + StackOffset\r
+ add sp, r1, r0\r
+\r
+_PrepareArguments\r
+ // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
+ LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
+ add r2, r2, #4\r
+ ldr r1, [r2]\r
+\r
+ // Move sec startup address into a data register\r
+ // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r3, StartupAddr\r
+ \r
+ // Jump to PrePeiCore C code\r
+ // r0 = mp_id\r
+ // r1 = pei_core_address\r
+ mov r0, r5\r
+ blx r3\r
+\r
+_SetupPrimaryCoreStack\r
+ // r1 contains the top of the primary stack\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
+\r
+ // The reserved space for global variable must be 8-bytes aligned for pushing\r
+ // 64-bit variable on the stack\r
+ SetPrimaryStack (r1, r2, r3)\r
+ b _PrepareArguments\r
+\r
+_NeverReturn\r
+ b _NeverReturn\r
+\r
+ END\r