Add ArmPlatformPkg from ARM Ltd. patch.

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCoreEntryPoint.asm

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
new file mode 100644 (file)
index 0000000..4426339
--- /dev/null
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
@@ -0,0 +1,61 @@
+//\r
+//  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+//  \r
+//  This program and the accompanying materials                          \r
+//  are licensed and made available under the terms and conditions of the BSD License         \r
+//  which accompanies this distribution.  The full text of the license may be found at        \r
+//  http://opensource.org/licenses/bsd-license.php                                            \r
+//\r
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+\r
+  INCLUDE AsmMacroIoLib.inc\r
+  \r
+  IMPORT  CEntryPoint\r
+  EXPORT  _ModuleEntryPoint\r
+  \r
+  PRESERVE8\r
+  AREA    PrePeiCoreEntryPoint, CODE, READONLY\r
+  \r
+StartupAddr        DCD      CEntryPoint\r
+\r
+SCC_SYS_SW         EQU      0x0004\r
+\r
+_ModuleEntryPoint\r
+  // Identify CPU ID\r
+  mrc   p15, 0, r0, c0, c0, 5\r
+  and   r0, #0xf\r
+\r
+_SetupStack\r
+  // Setup Stack for the 4 CPU cores\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)\r
+  \r
+  mov     r3,r0         // r3 = core_id\r
+  mul     r3,r3,r2      // r3 = core_id * stack_size = offset from the stack base\r
+  add     r3,r3,r1      // r3 = stack_base + offset\r
+  add     r3,r3,r2,LSR #1   // r3 = stack_offset + (stack_size/2)   <-- the top half is for the heap\r
+  mov     sp, r3\r
+\r
+  // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
+  LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)\r
+  add   r2, r2, #4\r
+  ldr   r1, [r2]\r
+\r
+  // move sec startup address into a data register\r
+  // ensure we're jumping to FV version of the code (not boot remapped alias)\r
+  ldr   r2, StartupAddr\r
+\r
+  // jump to SEC C code\r
+  //    r0 = core_id\r
+  //    r1 = pei_core_address\r
+  blx   r2\r
+\r
+  END\r