--- /dev/null
+//\r
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+\r
+#include <Chipset/ArmV7.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ IMPORT ArmReadMpidr\r
+ IMPORT ArmPlatformStackSet\r
+ \r
+ EXPORT _ModuleEntryPoint\r
+\r
+ PRESERVE8\r
+ AREA PrePiCoreEntryPoint, CODE, READONLY\r
+ \r
+StartupAddr DCD CEntryPoint\r
+\r
+_ModuleEntryPoint\r
+ // Get ID of this CPU in Multicore system\r
+ bl ArmReadMpidr\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
+ and r6, r0, r1\r
+\r
+_SetSVCMode\r
+ // Enter SVC mode, Disable FIQ and IRQ\r
+ mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r
+ msr CPSR_c, r1\r
+\r
+// Check if we can install the stack at the top of the System Memory or if we need\r
+// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
+// at the top of the DRAM)\r
+_SetupStackPosition\r
+ // Compute Top of System Memory\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
+ sub r2, r2, #1\r
+ add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
+\r
+ // Calculate Top of the Firmware Device\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
+ sub r3, r3, #1\r
+ add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
+\r
+ // UEFI Memory Size (stacks are allocated in this region)\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+\r
+ //\r
+ // Reserve the memory for the UEFI region (contain stacks on its top)\r
+ //\r
+\r
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
+ subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
+ cmp r0, r4\r
+ bge _SetupStack\r
+\r
+ // Case the top of stacks is the FdBaseAddress\r
+ mov r1, r2\r
+\r
+_SetupStack\r
+ // r1 contains the top of the stack (and the UEFI Memory)\r
+\r
+ // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
+ // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
+ // top of the memory space)\r
+ adds r7, r1, #1\r
+ bcs _SetupOverflowStack\r
+\r
+_SetupAlignedStack\r
+ mov r1, r7\r
+ b _GetBaseUefiMemory\r
+\r
+_SetupOverflowStack\r
+ // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
+ // aligned (4KB)\r
+ LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+ and r7, r7, r1\r
+ sub r1, r1, r7\r
+\r
+_GetBaseUefiMemory\r
+ // Calculate the Base of the UEFI Memory\r
+ sub r7, r1, r4\r
+\r
+_GetStackBase\r
+ // r1 = The top of the Mpcore Stacks\r
+ // Stack for the primary core = PrimaryCoreStack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ sub r8, r1, r2\r
+\r
+ // Stack for the secondary core = Number of Cores - 1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+ sub r0, r0, #1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+ mul r1, r1, r0\r
+ sub r8, r8, r1\r
+\r
+ // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+ mov r0, r8\r
+ mov r1, r6\r
+ //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ bl ArmPlatformStackSet\r
+\r
+ // Is it the Primary Core ?\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
+ cmp r6, r4\r
+ bne _PrepareArguments\r
+\r
+_ReserveGlobalVariable\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+ // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+ InitializePrimaryStack r0, r1\r
+\r
+_PrepareArguments\r
+ mov r0, r6\r
+ mov r1, r7\r
+ mov r2, r8\r
+ mov r3, sp\r
+\r
+ // Move sec startup address into a data register\r
+ // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r4, StartupAddr\r
+\r
+ // Jump to PrePiCore C code\r
+ // r0 = MpId\r
+ // r1 = UefiMemoryBase\r
+ // r2 = StacksBase\r
+ // r3 = GlobalVariableBase\r
+ blx r4\r
+\r
+_NeverReturn\r
+ b _NeverReturn\r
+\r
+ END\r
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