OvmfPkg/OvmfPkg.dec: Add the new include folder for CSM header files

[mirror_edk2.git] / ArmPlatformPkg / PrePi / MainMPCore.c

diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 603f4bb8be3f934b399df4615f5f3b5a3702048b..31cf085b6da9e0c393ec49278afc4f622a9de76f 100644 (file)
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -2,13 +2,7 @@
 *\r
 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *\r
-*  This program and the accompanying materials\r
-*  are licensed and made available under the terms and conditions of the BSD License\r
-*  which accompanies this distribution.  The full text of the license may be found at\r
-*  http://opensource.org/licenses/bsd-license.php\r
-*\r
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 *\r
 **/\r
 \r
@@ -26,12 +20,12 @@ PrimaryMain (
   )\r
 {\r
   // Enable the GIC Distributor\r
-  ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
+  ArmGicEnableDistributor(PcdGet64(PcdGicDistributorBase));\r
 \r
   // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization\r
   if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
     // Sending SGI to all the Secondary CPU interfaces\r
-    ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
+    ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
   }\r
 \r
   PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
@@ -88,11 +82,11 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
 \r
     // Acknowledge the interrupt and send End of Interrupt signal.\r
-    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);\r
+    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);\r
     // Check if it is a valid interrupt ID\r
-    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
+    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {\r
       // Got a valid SGI number hence signal End of Interrupt\r
-      ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
+      ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
     }\r
   } while (SecondaryEntryAddr == 0);\r
 \r