MdeModulePkg/Print2: Refine the comment for ASCII_VALUE_TO_STRING_S

[mirror_edk2.git] / DuetPkg / PciRootBridgeNoEnumerationDxe / X64 / PcatIo.c

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
index 6003a58309d797266d38d73922955f2da00a27bb..179df3d5a76453a4feefd820f871784ac5864e50 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/PcatIo.c
@@ -1,7 +1,7 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2006, Intel Corporation                                                         \r
-All rights reserved. This program and the accompanying materials                          \r
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
 http://opensource.org/licenses/bsd-license.php                                            \r
@@ -26,6 +26,7 @@ BOOLEAN                  mPciOptionRomTableInstalled = FALSE;
 EFI_PCI_OPTION_ROM_TABLE mPciOptionRomTable          = {0, NULL};\r
 \r
 EFI_STATUS\r
+EFIAPI\r
 PcatRootBridgeIoIoRead (\r
   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,\r
   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
@@ -44,6 +45,7 @@ PcatRootBridgeIoIoRead (
 }\r
 \r
 EFI_STATUS\r
+EFIAPI\r
 PcatRootBridgeIoIoWrite (\r
   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,\r
   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
@@ -100,7 +102,7 @@ PcatRootBridgeIoPciRW (
   UINT64                            PciExpressRegAddr;\r
   BOOLEAN                           UsePciExpressAccess;\r
 \r
-  if (Width < 0 || Width >= EfiPciWidthMaximum) {\r
+  if ((UINT32)Width >= EfiPciWidthMaximum) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
   \r
@@ -112,11 +114,11 @@ PcatRootBridgeIoPciRW (
 \r
   InStride    = 1 << (Width & 0x03);\r
   OutStride   = InStride;\r
-  if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {\r
+  if (Width >= EfiPciWidthFifoUint8 && Width <= EfiPciWidthFifoUint64) {\r
     InStride = 0;\r
   }\r
 \r
-  if (Width >= EfiCpuIoWidthFillUint8 && Width <= EfiCpuIoWidthFillUint64) {\r
+  if (Width >= EfiPciWidthFillUint8 && Width <= EfiPciWidthFillUint64) {\r
     OutStride = 0;\r
   }\r
 \r
@@ -129,7 +131,7 @@ PcatRootBridgeIoPciRW (
     // Check PciExpressBaseAddress\r
     //\r
     if ((PrivateData->PciExpressBaseAddress == 0) ||\r
-        (PrivateData->PciExpressBaseAddress >= EFI_MAX_ADDRESS)) {\r
+        (PrivateData->PciExpressBaseAddress >= MAX_ADDRESS)) {\r
       return EFI_UNSUPPORTED;\r
     } else {\r
       UsePciExpressAccess = TRUE;\r
@@ -434,8 +436,10 @@ CheckForRom (
 \r
           Pcir.ImageLength = 0;\r
 \r
-          if (EfiRomHeader.Signature == 0xaa55) {\r
-\r
+          if (EfiRomHeader.Signature == PCI_EXPANSION_ROM_HEADER_SIGNATURE &&\r
+              EfiRomHeader.PcirOffset != 0 &&\r
+              (EfiRomHeader.PcirOffset & 3) == 0 &&\r
+              RomBarSize + EfiRomHeader.PcirOffset + sizeof (PCI_DATA_STRUCTURE) <= MaxRomSize) {\r
             ZeroMem (&Pcir, sizeof(Pcir));\r
             IoDev->Mem.Read (\r
               IoDev, \r
@@ -445,6 +449,12 @@ CheckForRom (
               &Pcir\r
               );\r
 \r
+            if (Pcir.Signature != PCI_DATA_STRUCTURE_SIGNATURE) {\r
+              break;\r
+            }\r
+            if (RomBarSize + Pcir.ImageLength * 512 > MaxRomSize) {\r
+              break;\r
+            }\r
             if ((Pcir.Indicator & 0x80) == 0x00) {\r
               LastImage = FALSE;\r
             }\r
@@ -630,7 +640,7 @@ ScanPciRootBridgeForRoms(
       //\r
       // Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices\r
       //\r
-      if (Descriptors->AddrRangeMax < 0x100000000) {\r
+      if (Descriptors->AddrRangeMax < 0x100000000ULL) {\r
         //\r
         // Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB\r
         //\r