Retired PciIncompatibleDeviceSupportLib from IntelFrameworkModulePkg.

[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciBus.h

diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 4e206ff3b11b2c33fdcba42bc93ff9628b65dab2..df224d12c493e67545ebf5d44be609476c957d5d 100644 (file)
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -1,4 +1,5 @@
 /** @file\r
+  Header files and data structures needed by PCI Bus module.\r
 \r
 Copyright (c) 2006 - 2009, Intel Corporation\r
 All rights reserved. This program and the accompanying materials\r
@@ -15,10 +16,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #ifndef _EFI_PCI_BUS_H_\r
 #define _EFI_PCI_BUS_H_\r
 \r
-\r
 #include <FrameworkDxe.h>\r
 \r
-\r
 #include <Protocol/LoadedImage.h>\r
 #include <Protocol/PciHostBridgeResourceAllocation.h>\r
 #include <Protocol/PciIo.h>\r
@@ -30,7 +29,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <Protocol/PciHotPlugInit.h>\r
 #include <Protocol/Decompress.h>\r
 #include <Protocol/BusSpecificDriverOverride.h>\r
-#include <Protocol/UgaIo.h>\r
 #include <Protocol/IncompatiblePciDeviceSupport.h>\r
 \r
 #include <Library/DebugLib.h>\r
@@ -43,35 +41,14 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <Library/UefiBootServicesTableLib.h>\r
 #include <Library/DevicePathLib.h>\r
 #include <Library/PcdLib.h>\r
-#include <Library/PciIncompatibleDeviceSupportLib.h>\r
 #include <Library/PeCoffLib.h>\r
 \r
 #include <IndustryStandard/Pci.h>\r
 #include <IndustryStandard/PeImage.h>\r
 #include <IndustryStandard/Acpi.h>\r
-#include "ComponentName.h"\r
-\r
-\r
-//\r
-// Global Variables\r
-//\r
-extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;\r
-extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;\r
-extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;\r
-\r
-//\r
-// Driver Produced Protocol Prototypes\r
-//\r
 \r
-#define VGABASE1  0x3B0\r
-#define VGALIMIT1 0x3BB\r
-\r
-#define VGABASE2  0x3C0\r
-#define VGALIMIT2 0x3DF\r
-\r
-#define ISABASE   0x100\r
-#define ISALIMIT  0x3FF\r
+typedef struct _PCI_IO_DEVICE              PCI_IO_DEVICE;\r
+typedef struct _PCI_BAR                    PCI_BAR;\r
 \r
 typedef enum {\r
   PciBarTypeUnknown = 0,\r
@@ -86,7 +63,32 @@ typedef enum {
   PciBarTypeMaxType\r
 } PCI_BAR_TYPE;\r
 \r
-typedef struct {\r
+#include "ComponentName.h"\r
+#include "PciIo.h"\r
+#include "PciCommand.h"\r
+#include "PciDeviceSupport.h"\r
+#include "PciEnumerator.h"\r
+#include "PciEnumeratorSupport.h"\r
+#include "PciDriverOverride.h"\r
+#include "PciRomTable.h"\r
+#include "PciOptionRomSupport.h"\r
+#include "PciPowerManagement.h"\r
+#include "PciHotPlugSupport.h"\r
+#include "PciLib.h"\r
+\r
+#define VGABASE1  0x3B0\r
+#define VGALIMIT1 0x3BB\r
+\r
+#define VGABASE2  0x3C0\r
+#define VGALIMIT2 0x3DF\r
+\r
+#define ISABASE   0x100\r
+#define ISALIMIT  0x3FF\r
+\r
+//\r
+// PCI BAR parameters\r
+//\r
+struct _PCI_BAR {\r
   UINT64        BaseAddress;\r
   UINT64        Length;\r
   UINT64        Alignment;\r
@@ -94,7 +96,27 @@ typedef struct {
   BOOLEAN       Prefetchable;\r
   UINT8         MemType;\r
   UINT8         Offset;\r
-} PCI_BAR;\r
+};\r
+\r
+//\r
+// defined in PCI Card Specification, 8.0\r
+//\r
+#define PCI_CARD_MEMORY_BASE_0                0x1C\r
+#define PCI_CARD_MEMORY_LIMIT_0               0x20\r
+#define PCI_CARD_MEMORY_BASE_1                0x24\r
+#define PCI_CARD_MEMORY_LIMIT_1               0x28\r
+#define PCI_CARD_IO_BASE_0_LOWER              0x2C\r
+#define PCI_CARD_IO_BASE_0_UPPER              0x2E\r
+#define PCI_CARD_IO_LIMIT_0_LOWER             0x30\r
+#define PCI_CARD_IO_LIMIT_0_UPPER             0x32\r
+#define PCI_CARD_IO_BASE_1_LOWER              0x34\r
+#define PCI_CARD_IO_BASE_1_UPPER              0x36\r
+#define PCI_CARD_IO_LIMIT_1_LOWER             0x38\r
+#define PCI_CARD_IO_LIMIT_1_UPPER             0x3A\r
+#define PCI_CARD_BRIDGE_CONTROL               0x3E\r
+\r
+#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8\r
+#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9\r
 \r
 #define PPB_BAR_0                             0\r
 #define PPB_BAR_1                             1\r
@@ -110,8 +132,6 @@ typedef struct {
 #define P2C_IO_1                              3\r
 #define P2C_IO_2                              4\r
 \r
-#define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')\r
-\r
 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001\r
 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002\r
 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004\r
@@ -128,7 +148,7 @@ typedef struct {
 #define EFI_SET_SUPPORTS    0\r
 #define EFI_SET_ATTRIBUTES  1\r
 \r
-typedef struct _PCI_IO_DEVICE              PCI_IO_DEVICE;\r
+#define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')\r
 \r
 struct _PCI_IO_DEVICE {\r
   UINT32                                    Signature;\r
@@ -215,7 +235,7 @@ struct _PCI_IO_DEVICE {
   BOOLEAN                                   BusOverride;\r
 \r
   //\r
-  //  A list tracking reserved resource on a bridge device\r
+  // A list tracking reserved resource on a bridge device\r
   //\r
   LIST_ENTRY                                ReservedResourceList;\r
 \r
@@ -231,7 +251,6 @@ struct _PCI_IO_DEVICE {
 \r
 };\r
 \r
-\r
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \\r
   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)\r
 \r
@@ -244,39 +263,40 @@ struct _PCI_IO_DEVICE {
 #define PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS(a) \\r
   CR (a, PCI_IO_DEVICE, LoadFile2, PCI_IO_DEVICE_SIGNATURE)\r
 \r
+\r
+\r
 //\r
 // Global Variables\r
 //\r
-extern LIST_ENTRY                                   gPciDevicePool;\r
+extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;\r
+extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;\r
+extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;\r
 extern BOOLEAN                                      gFullEnumeration;\r
 extern UINTN                                        gPciHostBridgeNumber;\r
 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];\r
 extern UINT64                                       gAllOne;\r
 extern UINT64                                       gAllZero;\r
-\r
 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;\r
 \r
-#include "PciIo.h"\r
-#include "PciCommand.h"\r
-#include "PciDeviceSupport.h"\r
-#include "PciEnumerator.h"\r
-#include "PciEnumeratorSupport.h"\r
-#include "PciDriverOverride.h"\r
-#include "PciRomTable.h"\r
-#include "PciOptionRomSupport.h"\r
-#include "PciPowerManagement.h"\r
-#include "PciHotPlugSupport.h"\r
-#include "PciLib.h"\r
 \r
-//\r
-// PCI Bus Support Function Prototypes\r
-//\r
+/**\r
+  Macro that checks whether device is a GFX device.\r
+\r
+  @param  _p      Specified device.\r
+\r
+  @retval TRUE    Device is a a GFX device.\r
+  @retval FALSE   Device is not a a GFX device.\r
+\r
+**/\r
+#define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)\r
+\r
 /**\r
   Test to see if this driver supports ControllerHandle. Any ControllerHandle\r
   than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.\r
 \r
   @param  This                Protocol instance pointer.\r
-  @param  ControllerHandle    Handle of device to test.\r
+  @param  Controller          Handle of device to test.\r
   @param  RemainingDevicePath Optional parameter use to pick a specific child.\r
                               device to start.\r
 \r
@@ -298,7 +318,7 @@ PciBusDriverBindingSupported (
   all device under PCI bus.\r
 \r
   @param  This                 Protocol instance pointer.\r
-  @param  ControllerHandle     Handle of device to bind driver to.\r
+  @param  Controller           Handle of device to bind driver to.\r
   @param  RemainingDevicePath  Optional parameter use to pick a specific child.\r
                                device to start.\r
 \r
@@ -320,7 +340,7 @@ PciBusDriverBindingStart (
   created by this driver.\r
 \r
   @param  This              Protocol instance pointer.\r
-  @param  ControllerHandle  Handle of device to stop driver on.\r
+  @param  Controller        Handle of device to stop driver on.\r
   @param  NumberOfChildren  Number of Handles in ChildHandleBuffer. If number of\r
                             children is zero stop the entire bus driver.\r
   @param  ChildHandleBuffer List of Child Handles to Stop.\r
@@ -338,6 +358,4 @@ PciBusDriverBindingStop (
   IN  EFI_HANDLE                    *ChildHandleBuffer\r
   );\r
 \r
-#define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)\r
-\r
 #endif\r