IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

[mirror_edk2.git] / IntelFsp2Pkg / FspSecCore / Ia32 / SaveRestoreSseNasm.inc

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
index 4c321cbeceb2089596fc2a030eb4d4b827cd39ee..a222f2e37676042c66c8fe827ca1ac3f41509613 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------\r
 ;\r
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ; Abstract:\r
@@ -16,21 +16,21 @@
 ;\r
 ; Define SSE macros using SSE 4.1 instructions\r
 ; args 1:XMM, 2:IDX, 3:REG\r
-%macro SXMMN           3\r
+%macro SXMMN    3\r
              pinsrd  %1, %3, (%2 & 3)\r
              %endmacro\r
 \r
 ;\r
 ;args 1:XMM, 2:REG, 3:IDX\r
 ;\r
-%macro LXMMN           3\r
+%macro LXMMN    3\r
              pextrd  %2, %1, (%3 & 3)\r
              %endmacro\r
 %else\r
 ;\r
 ; Define SSE macros using SSE 2 instructions\r
 ; args 1:XMM, 2:IDX, 3:REG\r
-%macro SXMMN       3\r
+%macro SXMMN    3\r
              pinsrw  %1, %3, (%2 & 3) * 2\r
              ror     %3, 16\r
              pinsrw  %1, %3, (%2 & 3) * 2 + 1\r
@@ -38,19 +38,19 @@
              %endmacro\r
 \r
 ;\r
-;args 1:XMM, 2:REG,  3:IDX\r
+;args 1:XMM, 2:REG, 3:IDX\r
 ;\r
 %macro LXMMN    3\r
-             pshufd  %1, %1,  ((0E4E4E4h >> (%3 * 2))  & 0FFh)\r
+             pshufd  %1, %1, ((0E4E4E4h >> (%3 * 2))  & 0FFh)\r
              movd    %2, %1\r
-             pshufd  %1, %1,  ((0E4E4E4h >> (%3 * 2 + (%3 & 1) * 4)) & 0FFh)\r
+             pshufd  %1, %1, ((0E4E4E4h >> (%3 * 2 + (%3 & 1) * 4)) & 0FFh)\r
              %endmacro\r
 %endif\r
 \r
 ;\r
-; XMM7 to save/restore EBP, EBX, ESI, EDI\r
+; XMM7 to save/restore EBP - slot 0, EBX - slot 1, ESI - slot 2, EDI - slot 3\r
 ;\r
-%macro SAVE_REGS   0\r
+%macro SAVE_REGS    0\r
   SXMMN      xmm7, 0, ebp\r
   SXMMN      xmm7, 1, ebx\r
   SXMMN      xmm7, 2, esi\r
@@ -67,63 +67,67 @@
              %endmacro\r
 \r
 ;\r
-; XMM6 to save/restore EAX, EDX, ECX, ESP\r
+; XMM6 to save/restore ESP - slot 0, EAX - slot 1, EDX - slot 2, ECX - slot 3\r
 ;\r
-%macro LOAD_EAX     0\r
+%macro LOAD_ESP    0\r
+  movd       esp,  xmm6\r
+             %endmacro\r
+\r
+%macro SAVE_ESP    0\r
+  SXMMN      xmm6, 0, esp\r
+             %endmacro\r
+\r
+%macro LOAD_EAX    0\r
   LXMMN      xmm6, eax, 1\r
              %endmacro\r
 \r
-%macro SAVE_EAX     0\r
+%macro SAVE_EAX    0\r
   SXMMN      xmm6, 1, eax\r
              %endmacro\r
 \r
-%macro LOAD_EDX     0\r
+%macro LOAD_EDX    0\r
   LXMMN      xmm6, edx, 2\r
              %endmacro\r
 \r
-%macro SAVE_EDX     0\r
+%macro SAVE_EDX    0\r
   SXMMN      xmm6, 2, edx\r
              %endmacro\r
 \r
-%macro SAVE_ECX     0\r
-  SXMMN      xmm6, 3, ecx\r
-             %endmacro\r
-\r
-%macro LOAD_ECX     0\r
+%macro LOAD_ECX    0\r
   LXMMN      xmm6, ecx, 3\r
              %endmacro\r
 \r
-%macro SAVE_ESP     0\r
-  SXMMN      xmm6, 0, esp\r
+%macro SAVE_ECX    0\r
+  SXMMN      xmm6, 3, ecx\r
              %endmacro\r
 \r
-%macro LOAD_ESP     0\r
-  movd       esp,  xmm6\r
-             %endmacro\r
 ;\r
-; XMM5 for calling stack\r
+; XMM5 slot 0 for calling stack\r
 ; arg 1:Entry\r
 %macro CALL_XMM       1\r
              mov     esi, %%ReturnAddress\r
-             pslldq  xmm5, 4\r
-%ifdef USE_SSE41_FLAG\r
-             pinsrd  xmm5, esi, 0\r
-%else\r
-             pinsrw  xmm5, esi, 0\r
-             ror     esi,  16\r
-             pinsrw  xmm5, esi, 1\r
-%endif\r
+             SXMMN   xmm5, 0, esi\r
              mov     esi,  %1\r
              jmp     esi\r
 %%ReturnAddress:\r
              %endmacro\r
 \r
 %macro RET_XMM       0\r
-             movd    esi, xmm5\r
-             psrldq  xmm5, 4\r
+             LXMMN   xmm5, esi, 0\r
              jmp     esi\r
              %endmacro\r
 \r
+;\r
+; XMM5 slot 1 for uCode status\r
+;\r
+%macro LOAD_UCODE_STATUS    0\r
+  LXMMN      xmm5, eax, 1\r
+             %endmacro\r
+\r
+%macro SAVE_UCODE_STATUS    0\r
+  SXMMN      xmm5, 1, eax\r
+             %endmacro\r
+\r
 %macro ENABLE_SSE   0\r
             ;\r
             ; Initialize floating point units\r