\r
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
+Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
)\r
{\r
PCI_IO_DEVICE *PciIoDevice;\r
+ BOOLEAN IgnoreOptionRom;\r
\r
- PciIoDevice = NULL;\r
+ PciIoDevice = NULL;\r
+ IgnoreOptionRom = FALSE;\r
\r
DEBUG ((\r
DEBUG_INFO,\r
- "PciBus: Discovered %s @ [%02x|%02x|%02x]\n",\r
+ "PciBus: Discovered %s @ [%02x|%02x|%02x] [VID = 0x%x, DID = 0x%0x]\n",\r
IS_PCI_BRIDGE (Pci) ? L"PPB" :\r
IS_CARDBUS_BRIDGE (Pci) ? L"P2C" :\r
L"PCI",\r
Bus,\r
Device,\r
- Func\r
+ Func,\r
+ Pci->Hdr.VendorId,\r
+ Pci->Hdr.DeviceId\r
));\r
\r
if (!IS_PCI_BRIDGE (Pci)) {\r
//\r
// Update the bar information for this PCI device so as to support some specific device\r
//\r
- UpdatePciInfo (PciIoDevice);\r
+ UpdatePciInfo (PciIoDevice, &IgnoreOptionRom);\r
\r
if (PciIoDevice->DevicePath == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
// Detect this function has option rom\r
//\r
if (gFullEnumeration) {\r
- if (!IS_CARDBUS_BRIDGE (Pci)) {\r
+ if (!IS_CARDBUS_BRIDGE (Pci) && !IgnoreOptionRom) {\r
GetOpRomInfo (PciIoDevice);\r
}\r
\r
\r
@param PciIoDevice Input Pci device instance. Output Pci device instance with updated\r
Bar information.\r
+ @param IgnoreOptionRom Output If the option rom of incompatible device need to be ignored.\r
\r
@retval EFI_SUCCESS Successfully updated bar information.\r
@retval EFI_UNSUPPORTED Given PCI device doesn't belong to incompatible PCI device list.\r
**/\r
EFI_STATUS\r
UpdatePciInfo (\r
- IN OUT PCI_IO_DEVICE *PciIoDevice\r
+ IN OUT PCI_IO_DEVICE *PciIoDevice,\r
+ OUT BOOLEAN *IgnoreOptionRom\r
)\r
{\r
EFI_STATUS Status;\r
break;\r
}\r
\r
+ //\r
+ // According to "Table 20. ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage"\r
+ // in PI Spec 1.7, Type-specific flags can be set to 0 when Address Translation\r
+ // Offset == 6 to skip device option ROM (do not probe option rom BAR).\r
+ //\r
+ if (((Ptr->AddrTranslationOffset == PCI_MAX_BAR) && (Ptr->SpecificFlag == 0))) {\r
+ *IgnoreOptionRom = TRUE;\r
+ Ptr++;\r
+ continue;\r
+ }\r
+\r
for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex++) {\r
if ((Ptr->AddrTranslationOffset != MAX_UINT64) &&\r
(Ptr->AddrTranslationOffset != MAX_UINT8) &&\r
&Data32\r
);\r
if ((Data32 & EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) != 0) {\r
+ PciIoDevice->IsAriEnabled = TRUE;\r
//\r
// ARI forward support in bridge, so enable it.\r
//\r
//\r
// Calculate LastVF\r
//\r
- PFRid = EFI_PCI_RID (Bus, Device, Func);\r
- LastVF = PFRid + FirstVFOffset + (PciIoDevice->InitialVFs - 1) * VFStride;\r
+ if (PciIoDevice->InitialVFs == 0) {\r
+ PciIoDevice->ReservedBusNum = 0;\r
+ } else {\r
+ PFRid = EFI_PCI_RID (Bus, Device, Func);\r
+ LastVF = PFRid + FirstVFOffset + (PciIoDevice->InitialVFs - 1) * VFStride;\r
\r
- //\r
- // Calculate ReservedBusNum for this PF\r
- //\r
- PciIoDevice->ReservedBusNum = (UINT16)(EFI_PCI_BUS_OF_RID (LastVF) - Bus + 1);\r
+ //\r
+ // Calculate ReservedBusNum for this PF\r
+ //\r
+ PciIoDevice->ReservedBusNum = (UINT16)(EFI_PCI_BUS_OF_RID (LastVF) - Bus);\r
+ }\r
\r
DEBUG ((\r
DEBUG_INFO,\r