MdeModulePkg/PciHostBridgeDxe: Fix EBC build failure

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciHostBridgeDxe / PciRootBridgeIo.c

diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
index 78811419bf8df580e21864208d54941df10f4fb9..a0e7e5b6f2551fd47f7e4e18425422d0e8e628d2 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -2,7 +2,7 @@
 \r
   PCI Root Bridge Io Protocol code.\r
 \r
-Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -17,6 +17,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include "PciRootBridge.h"\r
 #include "PciHostResource.h"\r
 \r
+extern EDKII_IOMMU_PROTOCOL        *mIoMmuProtocol;\r
+\r
 #define NO_MAPPING  (VOID *) (UINTN) -1\r
 \r
 //\r
@@ -199,6 +201,7 @@ CreateRootBridge (
       break;\r
     default:\r
       ASSERT (FALSE);\r
+      Aperture = NULL;\r
       break;\r
     }\r
     RootBridge->ResAllocNode[Index].Type     = Index;\r
@@ -1071,11 +1074,36 @@ RootBridgeIoMap (
 \r
   RootBridge = ROOT_BRIDGE_FROM_THIS (This);\r
 \r
+  if (mIoMmuProtocol != NULL) {\r
+    if (!RootBridge->DmaAbove4G) {\r
+      //\r
+      // Clear 64bit support\r
+      //\r
+      if (Operation > EfiPciOperationBusMasterCommonBuffer) {\r
+        Operation = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION) (Operation - EfiPciOperationBusMasterRead64);\r
+      }\r
+    }\r
+    Status = mIoMmuProtocol->Map (\r
+                               mIoMmuProtocol,\r
+                               (EDKII_IOMMU_OPERATION) Operation,\r
+                               HostAddress,\r
+                               NumberOfBytes,\r
+                               DeviceAddress,\r
+                               Mapping\r
+                               );\r
+    return Status;\r
+  }\r
+\r
   PhysicalAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;\r
-  if (!RootBridge->DmaAbove4G && ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB)) {\r
+  if ((!RootBridge->DmaAbove4G ||\r
+       (Operation != EfiPciOperationBusMasterRead64 &&\r
+        Operation != EfiPciOperationBusMasterWrite64 &&\r
+        Operation != EfiPciOperationBusMasterCommonBuffer64)) &&\r
+      ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB)) {\r
+\r
     //\r
-    // If the root bridge can not handle performing DMA above 4GB but\r
-    // any part of the DMA transfer being mapped is above 4GB, then\r
+    // If the root bridge or the device cannot handle performing DMA above\r
+    // 4GB but any part of the DMA transfer being mapped is above 4GB, then\r
     // map the DMA transfer to a buffer below 4GB.\r
     //\r
 \r
@@ -1188,8 +1216,18 @@ RootBridgeIoUnmap (
   MAP_INFO                 *MapInfo;\r
   LIST_ENTRY               *Link;\r
   PCI_ROOT_BRIDGE_INSTANCE *RootBridge;\r
+  EFI_STATUS                Status;\r
+\r
+  if (mIoMmuProtocol != NULL) {\r
+    Status = mIoMmuProtocol->Unmap (\r
+                               mIoMmuProtocol,\r
+                               Mapping\r
+                               );\r
+    return Status;\r
+  }\r
 \r
   RootBridge = ROOT_BRIDGE_FROM_THIS (This);\r
+\r
   //\r
   // See if the Map() operation associated with this Unmap() required a mapping\r
   // buffer. If a mapping buffer was not required, then this function simply\r
@@ -1306,8 +1344,27 @@ RootBridgeIoAllocateBuffer (
 \r
   RootBridge = ROOT_BRIDGE_FROM_THIS (This);\r
 \r
+  if (mIoMmuProtocol != NULL) {\r
+    if (!RootBridge->DmaAbove4G) {\r
+      //\r
+      // Clear DUAL_ADDRESS_CYCLE\r
+      //\r
+      Attributes &= ~EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE;\r
+    }\r
+    Status = mIoMmuProtocol->AllocateBuffer (\r
+                               mIoMmuProtocol,\r
+                               Type,\r
+                               MemoryType,\r
+                               Pages,\r
+                               HostAddress,\r
+                               Attributes\r
+                               );\r
+    return Status;\r
+  }\r
+\r
   AllocateType = AllocateAnyPages;\r
-  if (!RootBridge->DmaAbove4G) {\r
+  if (!RootBridge->DmaAbove4G ||\r
+      (Attributes & EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0) {\r
     //\r
     // Limit allocations to memory below 4GB\r
     //\r
@@ -1349,6 +1406,17 @@ RootBridgeIoFreeBuffer (
   OUT VOID                             *HostAddress\r
   )\r
 {\r
+  EFI_STATUS                Status;\r
+\r
+  if (mIoMmuProtocol != NULL) {\r
+    Status = mIoMmuProtocol->FreeBuffer (\r
+                               mIoMmuProtocol,\r
+                               Pages,\r
+                               HostAddress\r
+                               );\r
+    return Status;\r
+  }\r
+\r
   return gBS->FreePages ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress, Pages);\r
 }\r
 \r