Just like EhciDxe, do not reset host controller when debug capability is enabled...

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / XhciReg.h

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
index eea468bbd78026aa85186a3c1db9dd5ffccb7c69..20a5510bfec9f714a3579ea221e50c9318b47682 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
@@ -29,6 +29,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define USB_HUB_CLASS_CODE          0x09\r
 #define USB_HUB_SUBCLASS_CODE       0x00\r
 \r
+#define XHC_CAP_USB_LEGACY          0x01\r
+#define XHC_CAP_USB_DEBUG           0x0A\r
+\r
 //============================================//\r
 //           XHCI register offset             //\r
 //============================================//\r
@@ -67,6 +70,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define XHC_ERSTBA_OFFSET                  0x30 // Event Ring Segment Table Base Address Register Offset\r
 #define XHC_ERDP_OFFSET                    0x38 // Event Ring Dequeue Pointer Register Offset\r
 \r
+//\r
+// Debug registers offset\r
+//\r
+#define XHC_DC_DCCTRL                      0x20\r
+\r
 #define USBLEGSP_BIOS_SEMAPHORE            BIT16 // HC BIOS Owned Semaphore\r
 #define USBLEGSP_OS_SEMAPHORE              BIT24 // HC OS Owned Semaphore\r
 \r
@@ -447,6 +455,21 @@ XhcClearRuntimeRegBit (
   IN UINT32               Bit\r
   );\r
 \r
+/**\r
+  Read XHCI extended capability register.\r
+\r
+  @param  Xhc          The XHCI Instance.\r
+  @param  Offset       The offset of the extended capability register.\r
+\r
+  @return The register content read\r
+\r
+**/\r
+UINT32\r
+XhcReadExtCapReg (\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
+  IN  UINT32              Offset\r
+  );\r
+\r
 /**\r
   Whether the XHCI host controller is halted.\r
 \r
@@ -524,16 +547,18 @@ XhcRunHC (
   );\r
 \r
 /**\r
-  Calculate the XHCI legacy support capability register offset.\r
+  Calculate the offset of the XHCI capability.\r
 \r
   @param  Xhc     The XHCI Instance.\r
+  @param  CapId   The XHCI Capability ID.\r
 \r
   @return The offset of XHCI legacy support capability register.\r
 \r
 **/\r
 UINT32\r
-XhcGetLegSupCapAddr (\r
-  IN USB_XHCI_INSTANCE    *Xhc\r
+XhcGetCapabilityAddr (\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
+  IN UINT8                CapId\r
   );\r
 \r
 #endif\r