/** @file\r
Ia32-specific functionality for DxeLoad.\r
\r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
IN EFI_PHYSICAL_ADDRESS StackBase,\r
IN UINTN StackSize\r
)\r
-{ \r
+{\r
UINT8 PhysicalAddressBits;\r
EFI_PHYSICAL_ADDRESS PhysicalAddress;\r
UINTN IndexOfPdpEntries;\r
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 30));\r
\r
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;\r
- PageAddress = (UINTN) AllocatePages (TotalPagesNum);\r
+ PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);\r
ASSERT (PageAddress != 0);\r
\r
PageMap = (VOID *) PageAddress;\r
//\r
// Each Directory Pointer entries points to a page of Page Directory entires.\r
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
- // \r
+ //\r
PageDirectoryEntry = (VOID *) PageAddress;\r
PageAddress += SIZE_4KB;\r
\r
PageDirectoryPointerEntry->Bits.Present = 1;\r
\r
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {\r
- if ((PhysicalAddress < StackBase + StackSize) && ((PhysicalAddress + SIZE_2MB) > StackBase)) {\r
+ if ((IsNullDetectionEnabled () && PhysicalAddress == 0)\r
+ || ((PhysicalAddress < StackBase + StackSize)\r
+ && ((PhysicalAddress + SIZE_2MB) > StackBase))) {\r
//\r
// Need to split this 2M page that covers stack range.\r
//\r
);\r
}\r
\r
+ //\r
+ // Protect the page table by marking the memory used for page table to be\r
+ // read-only.\r
+ //\r
+ EnablePageTableProtection ((UINTN)PageMap, FALSE);\r
+\r
return (UINTN) PageMap;\r
}\r
\r
return Available;\r
}\r
\r
+/**\r
+ The function will check if page table should be setup or not.\r
+\r
+ @retval TRUE Page table should be created.\r
+ @retval FALSE Page table should not be created.\r
+\r
+**/\r
+BOOLEAN\r
+ToBuildPageTable (\r
+ VOID\r
+ )\r
+{\r
+ if (!IsIa32PaeSupport ()) {\r
+ return FALSE;\r
+ }\r
+\r
+ if (IsNullDetectionEnabled ()) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGet8 (PcdHeapGuardPropertyMask) != 0) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGetBool (PcdCpuStackGuard)) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGetBool (PcdSetNxForStack) && IsExecuteDisableBitAvailable ()) {\r
+ return TRUE;\r
+ }\r
+\r
+ return FALSE;\r
+}\r
+\r
/**\r
Transfers control to DxeCore.\r
\r
EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r
BOOLEAN BuildPageTablesIa32Pae;\r
\r
+ if (IsNullDetectionEnabled ()) {\r
+ ClearFirst4KPage (HobList.Raw);\r
+ }\r
+\r
Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
ASSERT_EFI_ERROR (Status);\r
\r
TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
PageTables = 0;\r
- BuildPageTablesIa32Pae = (BOOLEAN) (PcdGetBool (PcdSetNxForStack) && IsIa32PaeSupport () && IsExecuteDisableBitAvailable ());\r
+ BuildPageTablesIa32Pae = ToBuildPageTable ();\r
if (BuildPageTablesIa32Pae) {\r
PageTables = Create4GPageTablesIa32Pae (BaseOfStack, STACK_SIZE);\r
- EnableExecuteDisableBit ();\r
+ if (IsExecuteDisableBitAvailable ()) {\r
+ EnableExecuteDisableBit();\r
+ }\r
}\r
\r
//\r