-#/**@file\r
-# Low leve x64 specific debug support functions.\r
-#\r
-# Copyright (c) 2006, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#**/\r
-\r
-.globl _OrigVector\r
-.globl _InterruptEntryStub\r
-.globl _StubSize\r
-.globl _CommonIdtEntry\r
-.globl _FxStorSupport\r
-\r
-_AppEsp: .long 0x11111111 # ?\r
-_DebugEsp: .long 0x22222222 # ?\r
-_ExtraPush: .long 0x33333333 # ?\r
-_ExceptData: .long 0x44444444 # ?\r
-_Eflags: .long 0x55555555 # ?\r
-_OrigVector: .long 0x66666666 # ?\r
-_StubSize: .long _InterruptEntryStubEnd - _InterruptEntryStub\r
-\r
-.globl _FxStorSupport\r
-_FxStorSupport:\r
- ret\r
-\r
-.globl _Vect2Desc\r
-_Vect2Desc:\r
- ret\r
-\r
-.globl _InterruptEntryStub\r
-_InterruptEntryStub:\r
- ret\r
-\r
-.globl _InterruptEntryStubEnd\r
-_InterruptEntryStubEnd:\r
- ret\r
-\r
-.globl _CommonIdtEntry\r
-_CommonIdtEntry:\r
- ret\r
-\r
-PhonyIretd:\r
- iret\r
+///**@file\r
+// Low leve x64 specific debug support functions.\r
+//\r
+// Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//**/\r
+\r
+ASM_GLOBAL ASM_PFX(OrigVector)\r
+ASM_GLOBAL ASM_PFX(InterruptEntryStub)\r
+ASM_GLOBAL ASM_PFX(StubSize)\r
+ASM_GLOBAL ASM_PFX(CommonIdtEntry)\r
+ASM_GLOBAL ASM_PFX(FxStorSupport)\r
+\r
+.data\r
+\r
+ASM_PFX(StubSize): .long ASM_PFX(InterruptEntryStubEnd) - ASM_PFX(InterruptEntryStub)\r
+ASM_PFX(AppRsp): .long 0x11111111 # ?\r
+ .long 0x11111111 # ?\r
+ASM_PFX(DebugRsp): .long 0x22222222 # ?\r
+ .long 0x22222222 # ?\r
+ASM_PFX(ExtraPush): .long 0x33333333 # ?\r
+ .long 0x33333333 # ?\r
+ASM_PFX(ExceptData): .long 0x44444444 # ?\r
+ .long 0x44444444 # ?\r
+ASM_PFX(Rflags): .long 0x55555555 # ?\r
+ .long 0x55555555 # ?\r
+ASM_PFX(OrigVector): .long 0x66666666 # ?\r
+ .long 0x66666666 # ?\r
+\r
+// The declarations below define the memory region that will be used for the debug stack.\r
+// The context record will be built by pushing register values onto this stack.\r
+// It is imparitive that alignment be carefully managed, since the FXSTOR and\r
+// FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.\r
+//\r
+// The stub will switch stacks from the application stack to the debuger stack\r
+// and pushes the exception number.\r
+//\r
+// Then we building the context record on the stack. Since the stack grows down,\r
+// we push the fields of the context record from the back to the front. There\r
+// are 336 bytes of stack used prior allocating the 512 bytes of stack to be\r
+// used as the memory buffer for the fxstor instruction. Therefore address of\r
+// the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which\r
+// must be 16 byte aligned.\r
+//\r
+// We carefully locate the stack to make this happen.\r
+//\r
+// For reference, the context structure looks like this:\r
+// struct {\r
+// UINT64 ExceptionData;\r
+// FX_SAVE_STATE_X64 FxSaveState; // 512 bytes, must be 16 byte aligned\r
+// UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+// UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+// UINT64 RFlags;\r
+// UINT64 Ldtr, Tr;\r
+// UINT64 Gdtr[2], Idtr[2];\r
+// UINT64 Rip;\r
+// UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
+// UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+// UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+// } SYSTEM_CONTEXT_X64; // 64 bit system context record\r
+\r
+.p2align 4\r
+DebugStackEnd : .ascii "DbgStkEnd >>>>>>" # 16 byte long string - must be 16 bytes to preserve alignment\r
+ .fill 0x1ffc, 4, 0x00000000\r
+ # 32K should be enough stack\r
+ # This allocation is coocked to insure\r
+ # that the the buffer for the FXSTORE instruction\r
+ # will be 16 byte aligned also.\r
+ #\r
+ASM_PFX(ExceptionNumber): .long 0x77777777 # first entry will be the vector number pushed by the stub\r
+ .long 0x77777777 # ?\r
+\r
+DebugStackBegin : .ascii "<<<< DbgStkBegin" # initial debug ESP == DebugStackBegin, set in stub\r
+\r
+\r
+.text\r
+\r
+//------------------------------------------------------------------------------\r
+// BOOLEAN\r
+// FxStorSupport (\r
+// void\r
+// )\r
+//\r
+// Abstract: Returns TRUE if FxStor instructions are supported\r
+//\r
+ASM_GLOBAL ASM_PFX(FxStorSupport)\r
+ASM_PFX(FxStorSupport):\r
+//\r
+// cpuid corrupts rbx which must be preserved per the C calling convention\r
+//\r
+ pushq %rbx\r
+ movq $1, %rax\r
+ cpuid\r
+ movl %edx, %eax\r
+ andq $0x01000000, %rax\r
+ shrq $24, %rax\r
+ popq %rbx\r
+ ret\r
+//------------------------------------------------------------------------------\r
+// void\r
+// Vect2Desc (\r
+// IA32_IDT_GATE_DESCRIPTOR * DestDesc, // rcx\r
+// void (*Vector) (void) // rdx\r
+// )\r
+//\r
+// Abstract: Encodes an IDT descriptor with the given physical address\r
+//\r
+ASM_GLOBAL ASM_PFX(Vect2Desc)\r
+ASM_PFX(Vect2Desc):\r
+ movq %rdx, %rax\r
+ movw %ax, (%rcx) # write bits 15..0 of offset\r
+ movw %cs, %dx\r
+ movw %dx, 2(%rcx) # SYS_CODE_SEL from GDT\r
+ movw $(0x0e00 | 0x8000), 4(%rcx) # type = 386 interrupt gate, present\r
+ shrq $16, %rax\r
+ movw %ax, 6(%rcx) # write bits 31..16 of offset\r
+ shrq $16, %rax\r
+ movl %eax, 8(%rcx) # write bits 63..32 of offset\r
+\r
+ ret\r
+\r
+//------------------------------------------------------------------------------\r
+// InterruptEntryStub\r
+//\r
+// Abstract: This code is not a function, but is a small piece of code that is\r
+// copied and fixed up once for each IDT entry that is hooked.\r
+//\r
+ASM_GLOBAL ASM_PFX(InterruptEntryStub)\r
+ASM_PFX(InterruptEntryStub):\r
+\r
+ pushq $0 # push vector number - will be modified before installed\r
+ jmp ASM_PFX(CommonIdtEntry)\r
+\r
+ASM_GLOBAL ASM_PFX(InterruptEntryStubEnd)\r
+ASM_PFX(InterruptEntryStubEnd):\r
+\r
+//------------------------------------------------------------------------------\r
+// CommonIdtEntry\r
+//\r
+// Abstract: This code is not a function, but is the common part for all IDT\r
+// vectors.\r
+//\r
+ASM_GLOBAL ASM_PFX(CommonIdtEntry)\r
+//\r
+// At this point, the stub has saved the current application stack esp into AppRsp\r
+// and switched stacks to the debug stack, where it pushed the vector number\r
+//\r
+// The application stack looks like this:\r
+//\r
+// ...\r
+// (last application stack entry)\r
+// [16 bytes alignment, do not care it]\r
+// SS from interrupted task\r
+// RSP from interrupted task\r
+// rflags from interrupted task\r
+// CS from interrupted task\r
+// RIP from interrupted task\r
+// Error code <-------------------- Only present for some exeption types\r
+//\r
+// Vector Number <----------------- pushed in our IDT Entry\r
+//\r
+\r
+\r
+// The stub switched us to the debug stack and pushed the interrupt number.\r
+//\r
+// Next, construct the context record. It will be build on the debug stack by\r
+// pushing the registers in the correct order so as to create the context structure\r
+// on the debug stack. The context record must be built from the end back to the\r
+// beginning because the stack grows down...\r
+//\r
+// For reference, the context record looks like this:\r
+//\r
+// typedef\r
+// struct {\r
+// UINT64 ExceptionData;\r
+// FX_SAVE_STATE_X64 FxSaveState;\r
+// UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+// UINT64 Cr0, Cr2, Cr3, Cr4, Cr8;\r
+// UINT64 RFlags;\r
+// UINT64 Ldtr, Tr;\r
+// UINT64 Gdtr[2], Idtr[2];\r
+// UINT64 Rip;\r
+// UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
+// UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+// UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+// } SYSTEM_CONTEXT_X64; // 64\r
+ASM_PFX(CommonIdtEntry):\r
+// NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp\r
+ pushq %rax\r
+ movq (8)(%rsp), %rax # save vector number\r
+ movq %rax, ASM_PFX(ExceptionNumber)(%rip) # save vector number\r
+ popq %rax\r
+ addq $8, %rsp # pop vector number\r
+ movq %rsp, ASM_PFX(AppRsp)(%rip) # save stack top\r
+ movq DebugStackBegin(%rip), %rsp # switch to debugger stack\r
+ subq $8, %rsp # leave space for vector number\r
+// UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+// UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ pushq %r15\r
+ pushq %r14\r
+ pushq %r13\r
+ pushq %r12\r
+ pushq %r11\r
+ pushq %r10\r
+ pushq %r9\r
+ pushq %r8\r
+ pushq %rax\r
+ pushq %rcx\r
+ pushq %rdx\r
+ pushq %rbx\r
+ pushq %rsp\r
+ pushq %rbp\r
+ pushq %rsi\r
+ pushq %rdi\r
+// Save interrupt state rflags register...\r
+ pushfq\r
+ popq %rax\r
+ movq %rax, ASM_PFX(Rflags)(%rip)\r
+// We need to determine if any extra data was pushed by the exception, and if so, save it\r
+// To do this, we check the exception number pushed by the stub, and cache the\r
+// result in a variable since we'll need this again.\r
+ cmpl $0, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $10, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $11, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $12, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $13, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $14, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ cmpl $17, ASM_PFX(ExceptionNumber)(%rip)\r
+ jz ExtraPushOne\r
+ movl $0, ASM_PFX(ExtraPush)(%rip)\r
+ movl $0, ASM_PFX(ExceptData)(%rip)\r
+ jmp ExtraPushDone\r
+ExtraPushOne:\r
+ movl $1, ASM_PFX(ExtraPush)(%rip)\r
+\r
+// If there's some extra data, save it also, and modify the saved AppRsp to effectively\r
+// pop this value off the application's stack.\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq (%rax), %rbx\r
+ movq %rbx, ASM_PFX(ExceptData)(%rip)\r
+ addq $8, %rax\r
+ movq %rax, ASM_PFX(AppRsp)(%rip)\r
+\r
+ExtraPushDone:\r
+\r
+// The "push" above pushed the debug stack rsp. Since what we're actually doing\r
+// is building the context record on the debug stack, we need to save the pushed\r
+// debug RSP, and replace it with the application's last stack entry...\r
+ movq 24(%rsp), %rax\r
+ movq %rax, ASM_PFX(DebugRsp)(%rip)\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq 24(%rax), %rax\r
+ # application stack has ss, rsp, rflags, cs, & rip, so\r
+ # last actual application stack entry is saved at offset\r
+ # 24 bytes from stack top.\r
+ movq %rax, 24(%rsp)\r
+\r
+// continue building context record\r
+// UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
+ mov %ss, %rax\r
+ pushq %rax\r
+ # CS from application is one entry back in application stack\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movzwq 8(%rax), %rax\r
+ pushq %rax\r
+\r
+ mov %ds, %rax\r
+ pushq %rax\r
+ mov %es, %rax\r
+ pushq %rax\r
+ mov %fs, %rax\r
+ pushq %rax\r
+ mov %gs, %rax\r
+ pushq %rax\r
+// UINT64 Rip;\r
+ # Rip from application is on top of application stack\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ pushq (%rax)\r
+// UINT64 Gdtr[2], Idtr[2];\r
+ push $0\r
+ push $0\r
+ sidtq (%rsp)\r
+ push $0\r
+ push $0\r
+ sgdtq (%rsp)\r
+\r
+// UINT64 Ldtr, Tr;\r
+ xorq %rax, %rax\r
+ str %ax\r
+ pushq %rax\r
+ sldt %ax\r
+ pushq %rax\r
+\r
+// UINT64 RFlags;\r
+// Rflags from application is two entries back in application stack\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ pushq 16(%rax)\r
+// UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+// insure FXSAVE/FXRSTOR is enabled in CR4...\r
+// ... while we're at it, make sure DE is also enabled...\r
+ movq %cr8, %rax\r
+ pushq %rax\r
+ movq %cr4, %rax\r
+ orq $0x208, %rax\r
+ movq %rax, %cr4\r
+ pushq %rax\r
+ movq %cr3, %rax\r
+ pushq %rax\r
+ movq %cr2, %rax\r
+ pushq %rax\r
+ push $0\r
+ movq %cr0, %rax\r
+ pushq %rax\r
+// UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ movq %dr7, %rax\r
+ pushq %rax\r
+// clear Dr7 while executing debugger itself\r
+ xorq %rax, %rax\r
+ movq %rax, %dr7\r
+\r
+ movq %dr6, %rax\r
+ pushq %rax\r
+// insure all status bits in dr6 are clear...\r
+ xorq %rax, %rax\r
+ movq %rax, %dr6\r
+\r
+ movq %dr3, %rax\r
+ pushq %rax\r
+ movq %dr2, %rax\r
+ pushq %rax\r
+ movq %dr1, %rax\r
+ pushq %rax\r
+ movq %dr0, %rax\r
+ pushq %rax\r
+\r
+// FX_SAVE_STATE_X64 FxSaveState;\r
+ subq $512, %rsp\r
+ movq %rsp, %rdi\r
+ # IMPORTANT!! The debug stack has been carefully constructed to\r
+ # insure that rsp and rdi are 16 byte aligned when we get here.\r
+ # They MUST be. If they are not, a GP fault will occur.\r
+\r
+ # FXSTOR_RDI\r
+ fxsave (%rdi)\r
+\r
+// UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear\r
+ cld\r
+ \r
+// UINT64 ExceptionData;\r
+ movq ASM_PFX(ExceptData)(%rip), %rax\r
+ pushq %rax\r
+\r
+// call to C code which will in turn call registered handler\r
+// pass in the vector number\r
+ movq %rsp, %rdx\r
+ movq ASM_PFX(ExceptionNumber)(%rip), %rcx\r
+ subq $40, %rsp\r
+ call ASM_PFX(InterruptDistrubutionHub)\r
+ addq $40, %rsp\r
+// restore context...\r
+// UINT64 ExceptionData;\r
+ addq $8, %rsp\r
+\r
+// FX_SAVE_STATE_X64 FxSaveState;\r
+ movq %rsp, %rsi\r
+\r
+ # FXRSTOR_RSI\r
+ fxrstor (%rsi)\r
+\r
+ addq $512, %rsp\r
+\r
+// UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ popq %rax\r
+ movq %rax, %dr0\r
+ popq %rax\r
+ movq %rax, %dr1\r
+ popq %rax\r
+ movq %rax, %dr2\r
+ popq %rax\r
+ movq %rax, %dr3\r
+\r
+// skip restore of dr6. We cleared dr6 during the context save.\r
+ addq $8, %rsp\r
+ popq %rax\r
+ movq %rax, %dr7\r
+\r
+// UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+ popq %rax\r
+ movq %rax, %cr0\r
+ addq $8, %rsp\r
+ popq %rax\r
+ movq %rax, %cr2\r
+ popq %rax\r
+ movq %rax, %cr3\r
+ popq %rax\r
+ movq %rax, %cr4\r
+ popq %rax\r
+ movq %rax, %cr8\r
+// UINT64 RFlags;\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ popq 16(%rax)\r
+// UINT64 Ldtr, Tr;\r
+// UINT64 Gdtr[2], Idtr[2];\r
+// Best not let anyone mess with these particular registers...\r
+ addq $48, %rsp\r
+// UINT64 Rip;\r
+ popq (%rax)\r
+\r
+// UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
+// NOTE - modified segment registers could hang the debugger... We\r
+// could attempt to insulate ourselves against this possibility,\r
+// but that poses risks as well.\r
+//\r
+\r
+ popq %rax\r
+ # mov %rax, %gs\r
+ popq %rax\r
+ # mov %rax, %fs\r
+ popq %rax\r
+ mov %rax, %es\r
+ popq %rax\r
+ mov %rax, %ds\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ popq 8(%rax)\r
+ popq %rax\r
+ mov %rax, %ss\r
+## The next stuff to restore is the general purpose registers that were pushed\r
+## using the "push" instruction.\r
+##\r
+## The value of RSP as stored in the context record is the application RSP\r
+## including the 5 entries on the application stack caused by the exception\r
+## itself. It may have been modified by the debug agent, so we need to\r
+## determine if we need to relocate the application stack.\r
+\r
+ movq 24(%rsp), %rbx # move the potentially modified AppRsp into rbx\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq 24(%rax), %rax\r
+ cmpq %rax, %rbx\r
+ je NoAppStackMove\r
+\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq (%rax), %rcx # RIP\r
+ movq %rcx, (%rbx)\r
+\r
+ movq 8(%rax), %rcx # CS\r
+ movq %rcx, 8(%rbx)\r
+\r
+ movq 16(%rax), %rcx # RFLAGS\r
+ movq %rcx, 16(%rbx)\r
+\r
+ movq 24(%rax), %rcx # RSP\r
+ movq %rcx, 24(%rbx)\r
+\r
+ movq 32(%rax), %rcx # SS\r
+ movq %rcx, 32(%rbx)\r
+\r
+ movq %rbx, %rax # modify the saved AppRsp to the new AppRsp\r
+ movq %rax, ASM_PFX(AppRsp)(%rip)\r
+NoAppStackMove:\r
+ movq ASM_PFX(DebugRsp)(%rip), %rax # restore the DebugRsp on the debug stack\r
+ # so our "pop" will not cause a stack switch\r
+ movq %rax, 24(%rsp)\r
+\r
+ cmpl $0x068, ASM_PFX(ExceptionNumber)(%rip)\r
+ jne NoChain\r
+\r
+Chain:\r
+\r
+// Restore rflags so when we chain, the flags will be exactly as if we were never here.\r
+// We gin up the stack to do an iretq so we can get ALL the flags.\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq 40(%rax), %rbx\r
+ pushq %rbx\r
+ mov %ss, %rax\r
+ pushq %rax\r
+ movq %rsp, %rax\r
+ addq $16, %rax\r
+ pushq %rax\r
+ movq ASM_PFX(AppRsp)(%rip), %rax\r
+ movq 16(%rax), %rbx\r
+ andq $0xfffffffffffffcff, %rbx # special handling for IF and TF\r
+ pushq %rbx\r
+ mov %cs, %rax\r
+ pushq %rax\r
+ movq PhonyIretq(%rip), %rax\r
+ pushq %rax\r
+ iretq\r
+PhonyIretq:\r
+\r
+// UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+// UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ popq %rdi\r
+ popq %rsi\r
+ popq %rbp\r
+ popq %rsp\r
+ popq %rbx\r
+ popq %rdx\r
+ popq %rcx\r
+ popq %rax\r
+ popq %r8\r
+ popq %r9\r
+ popq %r10\r
+ popq %r11\r
+ popq %r12\r
+ popq %r13\r
+ popq %r14\r
+ popq %r15\r
+\r
+// Switch back to application stack\r
+ movq ASM_PFX(AppRsp)(%rip), %rsp\r
+// Jump to original handler\r
+ jmp ASM_PFX(OrigVector)\r
+NoChain:\r
+// UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+// UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ popq %rdi\r
+ popq %rsi\r
+ popq %rbp\r
+ popq %rsp\r
+ popq %rbx\r
+ popq %rdx\r
+ popq %rcx\r
+ popq %rax\r
+ popq %r8\r
+ popq %r9\r
+ popq %r10\r
+ popq %r11\r
+ popq %r12\r
+ popq %r13\r
+ popq %r14\r
+ popq %r15\r
+\r
+// Switch back to application stack\r
+ movq ASM_PFX(AppRsp)(%rip), %rsp\r
+\r
+// We're outa here...\r
+ iret\r
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