Refine parameter description according to PI 1.2 errata A.

[mirror_edk2.git] / MdePkg / Include / Ppi / PciCfg2.h

diff --git a/MdePkg/Include/Ppi/PciCfg2.h b/MdePkg/Include/Ppi/PciCfg2.h
index f5ccb53dc6072b0c2faf69c51ae75f8b764fffad..95702c60f0d5037d032bd0b9ab4c38d7e83c43b3 100644 (file)
--- a/MdePkg/Include/Ppi/PciCfg2.h
+++ b/MdePkg/Include/Ppi/PciCfg2.h
@@ -4,7 +4,7 @@
   This ppi Provides platform or chipset-specific access to \r
   the PCI configuration space for a specific PCI segment.\r
 \r
-  Copyright (c) 2006 - 2008, Intel Corporation\r
+  Copyright (c) 2006 - 2009, Intel Corporation\r
   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -21,27 +21,39 @@
 #ifndef __PEI_PCI_CFG2_H__\r
 #define __PEI_PCI_CFG2_H__\r
 \r
-#include <Pi/PiPeiCis.h>\r
+#include <Library/BaseLib.h>\r
 \r
 #define EFI_PEI_PCI_CFG2_PPI_GUID \\r
   { 0x57a449a, 0x1fdc, 0x4c06, { 0xbf, 0xc9, 0xf5, 0x3f, 0x6a, 0x99, 0xbb, 0x92 } }\r
 \r
-\r
 typedef struct _EFI_PEI_PCI_CFG2_PPI   EFI_PEI_PCI_CFG2_PPI;\r
 \r
 #define EFI_PEI_PCI_CFG_ADDRESS(bus,dev,func,reg) \\r
-  (((bus) << 24) | \\r
-  ((dev) << 16) | \\r
-  ((func) << 8) | \\r
-  ((reg) < 256 ? (reg) : ((UINT64)(reg) << 32)));\r
+  (UINT64) ( \\r
+  (((UINTN) bus) << 24) | \\r
+  (((UINTN) dev) << 16) | \\r
+  (((UINTN) func) << 8) | \\r
+  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))));\r
 \r
 ///\r
 /// EFI_PEI_PCI_CFG_PPI_WIDTH\r
 ///\r
 typedef enum {\r
+  ///\r
+  ///  8-bit access\r
+  ///\r
   EfiPeiPciCfgWidthUint8  = 0,\r
+  ///\r
+  /// 16-bit access\r
+  ///\r
   EfiPeiPciCfgWidthUint16 = 1,\r
+  ///\r
+  /// 32-bit access\r
+  ///\r
   EfiPeiPciCfgWidthUint32 = 2,\r
+  ///\r
+  /// 64-bit access\r
+  ///\r
   EfiPeiPciCfgWidthUint64 = 3,\r
   EfiPeiPciCfgWidthMaximum\r
 } EFI_PEI_PCI_CFG_PPI_WIDTH;\r