MdePkg/Include/Ppi/PciCfg2.h

   1 /** @file
   2   This file declares PciCfg2 PPI.
   3
   4   This ppi Provides platform or chipset-specific access to
   5   the PCI configuration space for a specific PCI segment.
   6
   7   Copyright (c) 2006 - 2008, Intel Corporation
   8   All rights reserved. This program and the accompanying materials
   9   are licensed and made available under the terms and conditions of the BSD License
  10   which accompanies this distribution.  The full text of the license may be found at
  11   http://opensource.org/licenses/bsd-license.php
  12
  13   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16   @par Revision Reference:
  17   This PPI is introduced in PI Version 1.0.
  18
  19 **/
  20
  21 #ifndef __PEI_PCI_CFG2_H__
  22 #define __PEI_PCI_CFG2_H__
  23
  24 #include <Pi/PiPeiCis.h>
  25
  26 #define EFI_PEI_PCI_CFG2_PPI_GUID \
  27   { 0x57a449a, 0x1fdc, 0x4c06, { 0xbf, 0xc9, 0xf5, 0x3f, 0x6a, 0x99, 0xbb, 0x92 } }
  28
  29
  30 typedef struct _EFI_PEI_PCI_CFG2_PPI   EFI_PEI_PCI_CFG2_PPI;
  31
  32 #define EFI_PEI_PCI_CFG_ADDRESS(bus,dev,func,reg) \
  33   (((bus) << 24) | \
  34   ((dev) << 16) | \
  35   ((func) << 8) | \
  36   ((reg) < 256 ? (reg) : ((UINT64)(reg) << 32)));
  37
  38 ///
  39 /// EFI_PEI_PCI_CFG_PPI_WIDTH
  40 ///
  41 typedef enum {
  42   EfiPeiPciCfgWidthUint8  = 0,
  43   EfiPeiPciCfgWidthUint16 = 1,
  44   EfiPeiPciCfgWidthUint32 = 2,
  45   EfiPeiPciCfgWidthUint64 = 3,
  46   EfiPeiPciCfgWidthMaximum
  47 } EFI_PEI_PCI_CFG_PPI_WIDTH;
  48
  49 ///
  50 /// EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS
  51 ///
  52 typedef struct {
  53   ///
  54   /// 8-bit register offset within the PCI configuration space for a given device's function
  55   /// space.
  56   ///
  57   UINT8   Register;
  58   ///
  59   /// Only the 3 least-significant bits are used to encode one of 8 possible functions within a
  60   /// given device.
  61   ///
  62   UINT8   Function;
  63   ///
  64   /// Only the 5 least-significant bits are used to encode one of 32 possible devices.
  65   ///
  66   UINT8   Device;
  67   ///
  68   /// 8-bit value to encode between 0 and 255 buses.
  69   ///
  70   UINT8   Bus;
  71   ///
  72   /// Register number in PCI configuration space. If this field is zero, then Register is used
  73   /// for the register number. If this field is non-zero, then Register is ignored and this field
  74   /// is used for the register number.
  75   ///
  76   UINT32  ExtendedRegister;
  77 } EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;
  78
  79 /**
  80   Reads from or write to a given location in the PCI configuration space.
  81
  82   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.
  83
  84   @param  This            Pointer to local data for the interface.
  85
  86   @param  Width           The width of the access. Enumerated in bytes.
  87                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.
  88
  89   @param  Address         The physical address of the access. The format of
  90                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
  91
  92   @param  Buffer          A pointer to the buffer of data..
  93
  94
  95   @retval EFI_SUCCESS           The function completed successfully.
  96
  97   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
  98
  99   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this
 100                                 time.
 101
 102 **/
 103 typedef
 104 EFI_STATUS
 105 (EFIAPI *EFI_PEI_PCI_CFG2_PPI_IO)(
 106   IN CONST  EFI_PEI_SERVICES          **PeiServices,
 107   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
 108   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
 109   IN        UINT64                    Address,
 110   IN OUT    VOID                      *Buffer
 111 );
 112
 113
 114 /**
 115   Performs a read-modify-write operation on the contents
 116   from a given location in the PCI configuration space.
 117
 118   @param  PeiServices     An indirect pointer to the PEI Services Table
 119                           published by the PEI Foundation.
 120
 121   @param  This            Pointer to local data for the interface.
 122
 123   @param  Width           The width of the access. Enumerated in bytes. Type
 124                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
 125
 126   @param  Address         The physical address of the access.
 127
 128   @param  SetBits         Points to value to bitwise-OR with the read configuration value.
 129
 130                           The size of the value is determined by Width.
 131
 132   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.
 133                           The size of the value is determined by Width.
 134
 135
 136   @retval EFI_SUCCESS           The function completed successfully.
 137
 138   @retval EFI_DEVICE_ERROR      There was a problem with the transaction.
 139
 140   @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting
 141                                 the operation at this time.
 142
 143 **/
 144 typedef
 145 EFI_STATUS
 146 (EFIAPI *EFI_PEI_PCI_CFG2_PPI_RW)(
 147   IN CONST  EFI_PEI_SERVICES          **PeiServices,
 148   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
 149   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
 150   IN        UINT64                    Address,
 151   IN        VOID                      *SetBits,
 152   IN        VOID                      *ClearBits
 153 );
 154
 155 ///
 156 /// The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
 157 /// controllers behind a PCI root bridge controller.
 158 ///
 159 struct _EFI_PEI_PCI_CFG2_PPI {
 160   EFI_PEI_PCI_CFG2_PPI_IO  Read;
 161   EFI_PEI_PCI_CFG2_PPI_IO  Write;
 162   EFI_PEI_PCI_CFG2_PPI_RW  Modify;
 163   ///
 164   /// The PCI bus segment which the specified functions will access.
 165   ///
 166   UINT16                  Segment;
 167 };
 168
 169
 170 extern EFI_GUID gEfiPciCfg2PpiGuid;
 171
 172 #endif