;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
; );\r
;------------------------------------------------------------------------------\r
AsmFlushCacheLine PROC\r
+ ;\r
+ ; If the CPU does not support CLFLUSH instruction, \r
+ ; then promote flush range to flush entire cache.\r
+ ;\r
+ mov eax, 1\r
+ push ebx\r
+ cpuid\r
+ pop ebx\r
mov eax, [esp + 4]\r
+ test edx, BIT19\r
+ jz @F\r
clflush [eax]\r
ret\r
+@@:\r
+ wbinvd\r
+ ret\r
AsmFlushCacheLine ENDP\r
\r
END\r