Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib

[mirror_edk2.git] / MdePkg / Library / BaseLib / X64 / DisableCache.S

diff --git a/MdePkg/Library/BaseLib/X64/DisableCache.S b/MdePkg/Library/BaseLib/X64/DisableCache.S
new file mode 100644 (file)
index 0000000..44f82bb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/DisableCache.S
@@ -0,0 +1,39 @@
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006 - 2008, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DisableCache.S\r
+#\r
+# Abstract:\r
+#\r
+#   Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a\r
+#   WBINVD instruction.\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmDisableCache (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmDisableCache)\r
+ASM_PFX(AsmDisableCache):\r
+    movl    %cr0, %rax\r
+    btsl    $30, %rax\r
+    btrl    $29, %rax\r
+    movl    %rax, %cr0\r
+    wbinvd\r
+    ret\r