OvmfPkg/CsmSupportLib: move PAM register addresses to IndustryStandard

[mirror_edk2.git] / OvmfPkg / Csm / CsmSupportLib / LegacyRegion.c

diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
index 8d5d2e58a99438e1b9b81739f28cf3900ec81667..c13d4bb88f47cd478d22f722fcd040e0f0f63d9d 100644 (file)
--- a/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyRegion.c
@@ -52,35 +52,35 @@ STATIC LEGACY_MEMORY_SECTION_INFO   mSectionArray[] = {
 };\r
 \r
 STATIC PAM_REGISTER_VALUE  mRegisterValues440[] = {\r
-  {REG_PAM1_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM1_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM2_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM2_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM3_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM3_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM4_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM4_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM5_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM5_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM6_OFFSET_440, 0x01, 0x02},\r
-  {REG_PAM6_OFFSET_440, 0x10, 0x20},\r
-  {REG_PAM0_OFFSET_440, 0x10, 0x20}\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20},\r
+  {PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20}\r
 };\r
 \r
 STATIC PAM_REGISTER_VALUE  mRegisterValuesQ35[] = {\r
-  {REG_PAM1_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM1_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM2_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM2_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM3_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM3_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM4_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM4_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM5_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM5_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM6_OFFSET_Q35, 0x01, 0x02},\r
-  {REG_PAM6_OFFSET_Q35, 0x10, 0x20},\r
-  {REG_PAM0_OFFSET_Q35, 0x10, 0x20}\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20},\r
+  {DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20}\r
 };\r
 \r
 STATIC PAM_REGISTER_VALUE *mRegisterValues;\r
@@ -145,12 +145,12 @@ LegacyRegionManipulationInternal (
     if (ReadEnable != NULL) {\r
       if (*ReadEnable) {\r
         PciOr8 (\r
-          PCI_LIB_ADDRESS(PAM_PCI_BUS, PAM_PCI_DEV, PAM_PCI_FUNC, mRegisterValues[Index].PAMRegOffset),\r
+          mRegisterValues[Index].PAMRegPciLibAddress,\r
           mRegisterValues[Index].ReadEnableData\r
           );\r
       } else {\r
         PciAnd8 (\r
-          PCI_LIB_ADDRESS(PAM_PCI_BUS, PAM_PCI_DEV, PAM_PCI_FUNC, mRegisterValues[Index].PAMRegOffset),\r
+          mRegisterValues[Index].PAMRegPciLibAddress,\r
           (UINT8) (~mRegisterValues[Index].ReadEnableData)\r
           );\r
       }\r
@@ -158,12 +158,12 @@ LegacyRegionManipulationInternal (
     if (WriteEnable != NULL) {\r
       if (*WriteEnable) {\r
         PciOr8 (\r
-          PCI_LIB_ADDRESS(PAM_PCI_BUS, PAM_PCI_DEV, PAM_PCI_FUNC, mRegisterValues[Index].PAMRegOffset),\r
+          mRegisterValues[Index].PAMRegPciLibAddress,\r
           mRegisterValues[Index].WriteEnableData\r
           );\r
       } else {\r
         PciAnd8 (\r
-          PCI_LIB_ADDRESS(PAM_PCI_BUS, PAM_PCI_DEV, PAM_PCI_FUNC, mRegisterValues[Index].PAMRegOffset),\r
+          mRegisterValues[Index].PAMRegPciLibAddress,\r
           (UINT8) (~mRegisterValues[Index].WriteEnableData)\r
           );\r
       }\r
@@ -204,7 +204,7 @@ LegacyRegionGetInfoInternal (
   //\r
   *DescriptorCount = sizeof(mSectionArray) / sizeof (mSectionArray[0]);\r
   for (Index = 0; Index < *DescriptorCount; Index++) {\r
-    PamValue = PciRead8 (PCI_LIB_ADDRESS(PAM_PCI_BUS, PAM_PCI_DEV, PAM_PCI_FUNC, mRegisterValues[Index].PAMRegOffset));\r
+    PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);\r
     mSectionArray[Index].ReadEnabled = FALSE;\r
     if ((PamValue & mRegisterValues[Index].ReadEnableData) != 0) {\r
       mSectionArray[Index].ReadEnabled = TRUE;\r