OvmfPkg/PlatformPei: Initialise RCBA (B0:D31:F0 0xf0) register

[mirror_edk2.git] / OvmfPkg / PlatformPei / MemDetect.c

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 26e4feafe8e399366c12e6b023497a4d6f957f29..bd7bb0227d8c338173780a41bc8ce3db163cfa1d 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -24,6 +24,7 @@ Module Name:
 //\r
 // The Library classes this module consumes\r
 //\r
+#include <Library/BaseMemoryLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/HobLib.h>\r
 #include <Library/IoLib.h>\r
@@ -55,7 +56,7 @@ GetSystemMemorySizeBelow4gb (
   Cmos0x34 = (UINT8) CmosRead8 (0x34);\r
   Cmos0x35 = (UINT8) CmosRead8 (0x35);\r
 \r
-  return (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
+  return (UINT32) (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
 }\r
 \r
 \r
@@ -99,16 +100,21 @@ PublishPeiMemory (
   UINT64                      MemorySize;\r
   UINT64                      LowerMemorySize;\r
 \r
-  LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
-\r
-  //\r
-  // Determine the range of memory to use during PEI\r
-  //\r
-  MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);\r
-  MemorySize = LowerMemorySize - MemoryBase;\r
-  if (MemorySize > SIZE_64MB) {\r
-    MemoryBase = LowerMemorySize - SIZE_64MB;\r
-    MemorySize = SIZE_64MB;\r
+  if (mBootMode == BOOT_ON_S3_RESUME) {\r
+    MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);\r
+    MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);\r
+  } else {\r
+    LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
+\r
+    //\r
+    // Determine the range of memory to use during PEI\r
+    //\r
+    MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);\r
+    MemorySize = LowerMemorySize - MemoryBase;\r
+    if (MemorySize > SIZE_64MB) {\r
+      MemoryBase = LowerMemorySize - SIZE_64MB;\r
+      MemorySize = SIZE_64MB;\r
+    }\r
   }\r
 \r
   //\r
@@ -142,18 +148,22 @@ QemuInitializeRam (
   LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
   UpperMemorySize = GetSystemMemorySizeAbove4gb ();\r
 \r
-  //\r
-  // Create memory HOBs\r
-  //\r
-  AddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
-  AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r
+  if (mBootMode != BOOT_ON_S3_RESUME) {\r
+    //\r
+    // Create memory HOBs\r
+    //\r
+    AddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
+    AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r
+  }\r
 \r
   MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);\r
 \r
   MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);\r
 \r
   if (UpperMemorySize != 0) {\r
-    AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
+    if (mBootMode != BOOT_ON_S3_RESUME) {\r
+      AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
+    }\r
 \r
     MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);\r
   }\r
@@ -168,5 +178,76 @@ InitializeRamRegions (
   VOID\r
   )\r
 {\r
-  QemuInitializeRam ();\r
+  if (!mXen) {\r
+    QemuInitializeRam ();\r
+  } else {\r
+    XenPublishRamRegions ();\r
+  }\r
+\r
+  if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {\r
+    //\r
+    // This is the memory range that will be used for PEI on S3 resume\r
+    //\r
+    BuildMemoryAllocationHob (\r
+      (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),\r
+      (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),\r
+      EfiACPIMemoryNVS\r
+      );\r
+\r
+    //\r
+    // Cover the initial RAM area used as stack and temporary PEI heap.\r
+    //\r
+    // This is reserved as ACPI NVS so it can be used on S3 resume.\r
+    //\r
+    BuildMemoryAllocationHob (\r
+      PcdGet32 (PcdOvmfSecPeiTempRamBase),\r
+      PcdGet32 (PcdOvmfSecPeiTempRamSize),\r
+      EfiACPIMemoryNVS\r
+      );\r
+\r
+    //\r
+    // SEC stores its table of GUIDed section handlers here.\r
+    //\r
+    BuildMemoryAllocationHob (\r
+      PcdGet64 (PcdGuidedExtractHandlerTableAddress),\r
+      PcdGet32 (PcdGuidedExtractHandlerTableSize),\r
+      EfiACPIMemoryNVS\r
+      );\r
+\r
+#ifdef MDE_CPU_X64\r
+    //\r
+    // Reserve the initial page tables built by the reset vector code.\r
+    //\r
+    // Since this memory range will be used by the Reset Vector on S3\r
+    // resume, it must be reserved as ACPI NVS.\r
+    //\r
+    BuildMemoryAllocationHob (\r
+      (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),\r
+      (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),\r
+      EfiACPIMemoryNVS\r
+      );\r
+#endif\r
+  }\r
+\r
+  if (mBootMode != BOOT_ON_S3_RESUME) {\r
+    //\r
+    // Reserve the lock box storage area\r
+    //\r
+    // Since this memory range will be used on S3 resume, it must be\r
+    // reserved as ACPI NVS.\r
+    //\r
+    // If S3 is unsupported, then various drivers might still write to the\r
+    // LockBox area. We ought to prevent DXE from serving allocation requests\r
+    // such that they would overlap the LockBox storage.\r
+    //\r
+    ZeroMem (\r
+      (VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r
+      (UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)\r
+      );\r
+    BuildMemoryAllocationHob (\r
+      (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r
+      (UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),\r
+      mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData\r
+      );\r
+  }\r
 }\r