/**@file\r
Memory Detection for Virtual Machines.\r
\r
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
// The Library classes this module consumes\r
//\r
+#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/HobLib.h>\r
#include <Library/IoLib.h>\r
#include "Platform.h"\r
#include "Cmos.h"\r
\r
-STATIC\r
-UINTN\r
+UINT32\r
GetSystemMemorySizeBelow4gb (\r
+ VOID\r
)\r
{\r
UINT8 Cmos0x34;\r
Cmos0x34 = (UINT8) CmosRead8 (0x34);\r
Cmos0x35 = (UINT8) CmosRead8 (0x35);\r
\r
- return (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
+ return (UINT32) (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
}\r
\r
\r
UINT64 MemorySize;\r
UINT64 LowerMemorySize;\r
\r
- LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
-\r
- MemoryBase = PcdGet32 (PcdOvmfMemFvBase) + PcdGet32 (PcdOvmfMemFvSize);\r
- MemorySize = LowerMemorySize - MemoryBase;\r
- if (MemorySize > SIZE_64MB) {\r
- MemoryBase = LowerMemorySize - SIZE_64MB;\r
- MemorySize = SIZE_64MB;\r
+ if (mBootMode == BOOT_ON_S3_RESUME) {\r
+ MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);\r
+ MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);\r
+ } else {\r
+ LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
+\r
+ //\r
+ // Determine the range of memory to use during PEI\r
+ //\r
+ MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);\r
+ MemorySize = LowerMemorySize - MemoryBase;\r
+ if (MemorySize > SIZE_64MB) {\r
+ MemoryBase = LowerMemorySize - SIZE_64MB;\r
+ MemorySize = SIZE_64MB;\r
+ }\r
}\r
\r
//\r
\r
\r
/**\r
- Peform Memory Detection\r
-\r
- @return Top of memory\r
+ Peform Memory Detection for QEMU / KVM\r
\r
**/\r
-EFI_PHYSICAL_ADDRESS\r
-MemDetect (\r
+STATIC\r
+VOID\r
+QemuInitializeRam (\r
+ VOID\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PHYSICAL_ADDRESS MemoryBase;\r
- UINT64 MemorySize;\r
UINT64 LowerMemorySize;\r
UINT64 UpperMemorySize;\r
\r
- DEBUG ((EFI_D_ERROR, "MemDetect called\n"));\r
+ DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));\r
\r
//\r
// Determine total memory size available\r
LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r
UpperMemorySize = GetSystemMemorySizeAbove4gb ();\r
\r
- //\r
- // Determine the range of memory to use during PEI\r
- //\r
- MemoryBase = PcdGet32 (PcdOvmfMemFvBase) + PcdGet32 (PcdOvmfMemFvSize);\r
- MemorySize = LowerMemorySize - MemoryBase;\r
- if (MemorySize > SIZE_64MB) {\r
- MemoryBase = LowerMemorySize - SIZE_64MB;\r
- MemorySize = SIZE_64MB;\r
+ if (mBootMode != BOOT_ON_S3_RESUME) {\r
+ //\r
+ // Create memory HOBs\r
+ //\r
+ AddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
+ AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r
}\r
\r
- //\r
- // Publish this memory to the PEI Core\r
- //\r
- Status = PublishSystemMemory(MemoryBase, MemorySize);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Create memory HOBs\r
- //\r
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
- AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r
-\r
MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);\r
\r
MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);\r
\r
if (UpperMemorySize != 0) {\r
- AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
+ if (mBootMode != BOOT_ON_S3_RESUME) {\r
+ AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r
+ }\r
\r
MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);\r
}\r
-\r
- return LowerMemorySize;\r
}\r
\r
+/**\r
+ Publish system RAM and reserve memory regions\r
+\r
+**/\r
+VOID\r
+InitializeRamRegions (\r
+ VOID\r
+ )\r
+{\r
+ if (!mXen) {\r
+ QemuInitializeRam ();\r
+ } else {\r
+ XenPublishRamRegions ();\r
+ }\r
+\r
+ if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {\r
+ //\r
+ // This is the memory range that will be used for PEI on S3 resume\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),\r
+ (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),\r
+ EfiACPIMemoryNVS\r
+ );\r
+\r
+ //\r
+ // Cover the initial RAM area used as stack and temporary PEI heap.\r
+ //\r
+ // This is reserved as ACPI NVS so it can be used on S3 resume.\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ PcdGet32 (PcdOvmfSecPeiTempRamBase),\r
+ PcdGet32 (PcdOvmfSecPeiTempRamSize),\r
+ EfiACPIMemoryNVS\r
+ );\r
+\r
+ //\r
+ // SEC stores its table of GUIDed section handlers here.\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ PcdGet64 (PcdGuidedExtractHandlerTableAddress),\r
+ PcdGet32 (PcdGuidedExtractHandlerTableSize),\r
+ EfiACPIMemoryNVS\r
+ );\r
+\r
+#ifdef MDE_CPU_X64\r
+ //\r
+ // Reserve the initial page tables built by the reset vector code.\r
+ //\r
+ // Since this memory range will be used by the Reset Vector on S3\r
+ // resume, it must be reserved as ACPI NVS.\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),\r
+ (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),\r
+ EfiACPIMemoryNVS\r
+ );\r
+#endif\r
+ }\r
+\r
+ if (mBootMode != BOOT_ON_S3_RESUME) {\r
+ //\r
+ // Reserve the lock box storage area\r
+ //\r
+ // Since this memory range will be used on S3 resume, it must be\r
+ // reserved as ACPI NVS.\r
+ //\r
+ // If S3 is unsupported, then various drivers might still write to the\r
+ // LockBox area. We ought to prevent DXE from serving allocation requests\r
+ // such that they would overlap the LockBox storage.\r
+ //\r
+ ZeroMem (\r
+ (VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r
+ (UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)\r
+ );\r
+ BuildMemoryAllocationHob (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r
+ (UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),\r
+ mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData\r
+ );\r
+ }\r
+}\r
projects / mirror_edk2.git / blobdiff