Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly"

[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.h

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 3e5dca2ce7002604fdde1bad691cb6f886377ac7..81af8b71480f72190882679e37f639169733084b 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -1,20 +1,16 @@
 /** @file\r
   Platform PEI module include file.\r
 \r
-  Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
 #ifndef _PLATFORM_PEI_H_INCLUDED_\r
 #define _PLATFORM_PEI_H_INCLUDED_\r
 \r
+#include <IndustryStandard/E820.h>\r
+\r
 VOID\r
 AddIoMemoryBaseSizeHob (\r
   EFI_PHYSICAL_ADDRESS        MemoryBase,\r
@@ -40,19 +36,34 @@ AddMemoryRangeHob (
   );\r
 \r
 VOID\r
-AddUntestedMemoryBaseSizeHob (\r
+AddReservedMemoryBaseSizeHob (\r
   EFI_PHYSICAL_ADDRESS        MemoryBase,\r
-  UINT64                      MemorySize\r
+  UINT64                      MemorySize,\r
+  BOOLEAN                     Cacheable\r
   );\r
 \r
 VOID\r
-AddUntestedMemoryRangeHob (\r
-  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
-  EFI_PHYSICAL_ADDRESS        MemoryLimit\r
+AddressWidthInitialization (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+Q35TsegMbytesInitialization (\r
+  VOID\r
+  );\r
+\r
+EFI_STATUS\r
+PublishPeiMemory (\r
+  VOID\r
+  );\r
+\r
+UINT32\r
+GetSystemMemorySizeBelow4gb (\r
+  VOID\r
   );\r
 \r
-EFI_PHYSICAL_ADDRESS\r
-MemDetect (\r
+VOID\r
+InitializeRamRegions (\r
   VOID\r
   );\r
 \r
@@ -61,4 +72,46 @@ PeiFvInitialization (
   VOID\r
   );\r
 \r
+VOID\r
+InstallFeatureControlCallback (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+InstallClearCacheCallback (\r
+  VOID\r
+  );\r
+\r
+EFI_STATUS\r
+InitializeXen (\r
+  VOID\r
+  );\r
+\r
+BOOLEAN\r
+XenDetect (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+AmdSevInitialize (\r
+  VOID\r
+  );\r
+\r
+extern BOOLEAN mXen;\r
+\r
+VOID\r
+XenPublishRamRegions (\r
+  VOID\r
+  );\r
+\r
+extern EFI_BOOT_MODE mBootMode;\r
+\r
+extern BOOLEAN mS3Supported;\r
+\r
+extern UINT8 mPhysMemAddressWidth;\r
+\r
+extern UINT32 mMaxCpuCount;\r
+\r
+extern UINT16 mHostBridgeDevId;\r
+\r
 #endif // _PLATFORM_PEI_H_INCLUDED_\r