SourceLevelDebugPkg: Replace Opcode with the corresponding instructions.

[mirror_edk2.git] / SourceLevelDebugPkg / Library / DebugAgent / DebugAgentCommon / Ia32 / AsmFuncs.nasm

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.nasm b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.nasm
index 912256ba455afa0f870394937c6e8987e45e9ce5..b5e5a96e3467aa612c1a8964d9c74ae777afee0e 100644 (file)
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.nasm
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.nasm
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------\r
 ;\r
-; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ; Module Name:\r
@@ -321,7 +321,7 @@ NoExtrPush:
     test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.\r
                         ; edx still contains result from CPUID above\r
     jz      .2\r
-    db 0xf, 0xae, 00000111y ;fxsave [edi]\r
+    fxsave  [edi]\r
 .2:\r
 \r
     ;; save the exception data\r
@@ -342,7 +342,7 @@ NoExtrPush:
     cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r
     test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support\r
     jz      .3\r
-    db 0xf, 0xae, 00001110y ; fxrstor [esi]\r
+    fxrstor [esi]\r
 .3:\r
     add esp, 512\r
 \r