;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
; Module Name:\r
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.\r
; edx still contains result from CPUID above\r
jz .2\r
- db 0xf, 0xae, 00000111y ;fxsave [edi]\r
+ fxsave [edi]\r
.2:\r
\r
;; save the exception data\r
cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
jz .3\r
- db 0xf, 0xae, 00001110y ; fxrstor [esi]\r
+ fxrstor [esi]\r
.3:\r
add esp, 512\r
\r
;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
; Module Name:\r
rep stosq\r
pop rcx\r
mov rdi, rsp\r
- db 0xf, 0xae, 00000111y ;fxsave [rdi]\r
+ fxsave [rdi]\r
\r
;; save the exception data\r
push qword [rbp + 16]\r
add rsp, 8\r
\r
mov rsi, rsp\r
- db 0xf, 0xae, 00001110y ; fxrstor [rsi]\r
+ fxrstor [rsi]\r
add rsp, 512\r
\r
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r