SourceLevelDebugPkg: Clean up source files

[mirror_edk2.git] / SourceLevelDebugPkg / Library / DebugCommunicationLibUsb3 / DebugCommunicationLibUsb3Transfer.c

diff --git a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Transfer.c b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Transfer.c
index 1b6645bd1c6d422be1ce56cec58d92364cbe9fdd..fb48010a9a1b36ff1e07dbcc12720f9bd6e3f44c 100644 (file)
--- a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Transfer.c
+++ b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Transfer.c
@@ -41,7 +41,7 @@ XhcSyncTrsRing (
   TrsTrb = (TRB_TEMPLATE *)(UINTN) TrsRing->RingEnqueue;\r
 \r
   ASSERT (TrsTrb != NULL);\r
-  \r
+\r
   for (Index = 0; Index < TrsRing->TrbNumber; Index++) {\r
     if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {\r
       break;\r
@@ -185,9 +185,9 @@ IsTrbInTrsRing (
 {\r
   TRB_TEMPLATE  *CheckedTrb;\r
   UINTN         Index;\r
-  \r
+\r
   CheckedTrb = (TRB_TEMPLATE *)(UINTN) Ring->RingSeg0;\r
-  \r
+\r
   ASSERT (Ring->TrbNumber == TR_RING_TRB_NUMBER);\r
 \r
   for (Index = 0; Index < Ring->TrbNumber; Index++) {\r
@@ -222,7 +222,7 @@ XhcCheckUrbResult (
   UINT64                  XhcDequeue;\r
   UINT32                  High;\r
   UINT32                  Low;\r
-  \r
+\r
   ASSERT ((Handle != NULL) && (Urb != NULL));\r
 \r
   if (Urb->Finished) {\r
@@ -230,12 +230,12 @@ XhcCheckUrbResult (
   }\r
 \r
   EvtTrb = NULL;\r
-  \r
+\r
   //\r
   // Traverse the event ring to find out all new events from the previous check.\r
   //\r
   XhcSyncEventRing (Handle, &Handle->EventRing);\r
-  \r
+\r
   for (Index = 0; Index < Handle->EventRing.TrbNumber; Index++) {\r
 \r
     Status = XhcCheckNewEvent (Handle, &Handle->EventRing, ((TRB_TEMPLATE **)&EvtTrb));\r
@@ -245,13 +245,13 @@ XhcCheckUrbResult (
       //\r
       goto EXIT;\r
     }\r
-    \r
+\r
     if ((EvtTrb->Type != TRB_TYPE_COMMAND_COMPLT_EVENT) && (EvtTrb->Type != TRB_TYPE_TRANS_EVENT)) {\r
       continue;\r
     }\r
-    \r
+\r
     TRBPtr = (TRB_TEMPLATE *)(UINTN)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));\r
-    \r
+\r
     if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Urb->Ring), TRBPtr)) {\r
       CheckedUrb = Urb;\r
     } else if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Handle->UrbIn.Ring), TRBPtr)) {\r
@@ -269,7 +269,7 @@ XhcCheckUrbResult (
     } else {\r
       continue;\r
     }\r
-    \r
+\r
     if ((EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) ||\r
         (EvtTrb->Completecode == TRB_COMPLETION_SUCCESS)) {\r
       //\r
@@ -326,9 +326,9 @@ XhcRingDoorBell (
 \r
   //\r
   // 7.6.8.2 DCDB Register\r
-  //  \r
+  //\r
   Dcdb = (Urb->Direction == EfiUsbDataIn) ? 0x100 : 0x0;\r
-  \r
+\r
   XhcWriteDebugReg (\r
     Handle,\r
     XHC_DC_DCDB,\r
@@ -378,7 +378,7 @@ XhcExecTransfer (
     // If time out occurs.\r
     //\r
     Urb->Result |= EFI_USB_ERR_TIMEOUT;\r
-  } \r
+  }\r
   //\r
   // If URB transfer is error, restore transfer ring to original value before URB transfer\r
   // This will make the current transfer TRB is always at the latest unused one in transfer ring.\r
@@ -425,7 +425,7 @@ XhcCreateTransferTrb (
   } else {\r
     EPRing = &Handle->TransferRingOut;\r
   }\r
-  \r
+\r
   Urb->Ring = (EFI_PHYSICAL_ADDRESS)(UINTN) EPRing;\r
   XhcSyncTrsRing (Handle, EPRing);\r
 \r
@@ -439,12 +439,12 @@ XhcCreateTransferTrb (
   Trb->TrbNormal.ISP       = 1;\r
   Trb->TrbNormal.IOC       = 1;\r
   Trb->TrbNormal.Type      = TRB_TYPE_NORMAL;\r
-  \r
+\r
   //\r
   // Update the cycle bit to indicate this TRB has been consumed.\r
   //\r
   Trb->TrbNormal.CycleBit = EPRing->RingPCS & BIT0;\r
-  \r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
@@ -470,7 +470,7 @@ XhcCreateUrb (
   EFI_STATUS                    Status;\r
   URB                           *Urb;\r
   EFI_PHYSICAL_ADDRESS          UrbData;\r
-  \r
+\r
   if (Direction == EfiUsbDataIn) {\r
     Urb = &Handle->UrbIn;\r
   } else {\r
@@ -478,17 +478,17 @@ XhcCreateUrb (
   }\r
 \r
   UrbData  = Urb->Data;\r
-  \r
+\r
   ZeroMem (Urb, sizeof (URB));\r
   Urb->Direction = Direction;\r
-  \r
+\r
   //\r
   // Allocate memory to move data from CAR or SMRAM to normal memory\r
   // to make XHCI DMA successfully\r
   // re-use the pre-allocate buffer in PEI to avoid DXE memory service or gBS are not ready\r
   //\r
   Urb->Data  = UrbData;\r
-  \r
+\r
   if (Direction == EfiUsbDataIn) {\r
     //\r
     // Do not break URB data in buffer as it may contain the data which were just put in via DMA by XHC\r
@@ -502,7 +502,7 @@ XhcCreateUrb (
     CopyMem ((VOID*)(UINTN) Urb->Data, Data, DataLen);\r
     Urb->DataLen  = (UINT32) DataLen;\r
   }\r
-  \r
+\r
   Status = XhcCreateTransferTrb (Handle, Urb);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
@@ -539,7 +539,7 @@ XhcDataTransfer (
 {\r
   URB                     *Urb;\r
   EFI_STATUS              Status;\r
-  \r
+\r
   //\r
   // Validate the parameters\r
   //\r
@@ -562,7 +562,7 @@ XhcDataTransfer (
   if (Urb->Result == EFI_USB_NOERROR) {\r
     Status = EFI_SUCCESS;\r
   }\r
-  \r
+\r
   if (Direction == EfiUsbDataIn) {\r
     //\r
     // Move data from internal buffer to outside buffer (outside buffer may be in SMRAM...)\r