**/\r
VOID\r
CpuidExtendedTopology (\r
- VOID\r
+ UINT32 LeafFunction\r
)\r
{\r
CPUID_EXTENDED_TOPOLOGY_EAX Eax;\r
UINT32 Edx;\r
UINT32 LevelNumber;\r
\r
- if (CPUID_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {\r
+ if (LeafFunction > gMaximumBasicFunction) {\r
+ return;\r
+ }\r
+ if ((LeafFunction != CPUID_EXTENDED_TOPOLOGY) && (LeafFunction != CPUID_V2_EXTENDED_TOPOLOGY)) {\r
return;\r
}\r
\r
LevelNumber = 0;\r
- do {\r
+ for (LevelNumber = 0; ; LevelNumber++) {\r
AsmCpuidEx (\r
- CPUID_EXTENDED_TOPOLOGY, LevelNumber,\r
+ LeafFunction, LevelNumber,\r
&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx\r
);\r
- if (Eax.Bits.ApicIdShift != 0) {\r
- Print (L"CPUID_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_TOPOLOGY, LevelNumber);\r
- Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);\r
- PRINT_BIT_FIELD (Eax, ApicIdShift);\r
- PRINT_BIT_FIELD (Ebx, LogicalProcessors);\r
- PRINT_BIT_FIELD (Ecx, LevelNumber);\r
- PRINT_BIT_FIELD (Ecx, LevelType);\r
- PRINT_VALUE (Edx, x2APIC_ID);\r
+ if (Ecx.Bits.LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID) {\r
+ break;\r
}\r
- LevelNumber++;\r
- } while (Eax.Bits.ApicIdShift != 0);\r
+ Print (\r
+ L"%a (Leaf %08x, Sub-Leaf %08x)\n",\r
+ LeafFunction == CPUID_EXTENDED_TOPOLOGY ? "CPUID_EXTENDED_TOPOLOGY" : "CPUID_V2_EXTENDED_TOPOLOGY",\r
+ LeafFunction, LevelNumber\r
+ );\r
+ Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);\r
+ PRINT_BIT_FIELD (Eax, ApicIdShift);\r
+ PRINT_BIT_FIELD (Ebx, LogicalProcessors);\r
+ PRINT_BIT_FIELD (Ecx, LevelNumber);\r
+ PRINT_BIT_FIELD (Ecx, LevelType);\r
+ PRINT_VALUE (Edx, x2APIC_ID);\r
+ }\r
}\r
\r
/**\r
PRINT_BIT_FIELD (Edx, MaximumNum);\r
}\r
\r
-/**\r
- Display CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION main leaf and sub-leafs.\r
-\r
-**/\r
-VOID\r
-CpuidV2ExtendedTopologyEnumeration (\r
- VOID\r
- )\r
-{\r
- CPUID_EXTENDED_TOPOLOGY_EAX Eax;\r
- CPUID_EXTENDED_TOPOLOGY_EBX Ebx;\r
- CPUID_EXTENDED_TOPOLOGY_ECX Ecx;\r
- UINT32 Edx;\r
-\r
- if (CPUID_V2_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {\r
- return;\r
- }\r
-\r
- AsmCpuidEx (\r
- CPUID_V2_EXTENDED_TOPOLOGY,\r
- 0,\r
- &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx\r
- );\r
- Print (L"CPUID_V2_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_V2_EXTENDED_TOPOLOGY, 0);\r
- Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);\r
-\r
- PRINT_BIT_FIELD (Eax, ApicIdShift);\r
- PRINT_BIT_FIELD (Ebx, LogicalProcessors);\r
- PRINT_BIT_FIELD (Ecx, LevelNumber);\r
- PRINT_BIT_FIELD (Ecx, LevelType);\r
- PRINT_VALUE (Edx, x2APICID);\r
-}\r
-\r
/**\r
Display CPUID_EXTENDED_FUNCTION leaf.\r
\r
CpuidStructuredExtendedFeatureFlags ();\r
CpuidDirectCacheAccessInfo();\r
CpuidArchitecturalPerformanceMonitoring ();\r
- CpuidExtendedTopology ();\r
+ CpuidExtendedTopology (CPUID_EXTENDED_TOPOLOGY);\r
CpuidExtendedStateMainLeaf ();\r
CpuidIntelRdtMonitoringEnumerationSubLeaf ();\r
CpuidIntelRdtMonitoringL3CacheCapabilitySubLeaf ();\r
CpuidProcessorFrequency ();\r
CpuidSocVendor ();\r
CpuidDeterministicAddressTranslationParameters ();\r
- CpuidV2ExtendedTopologyEnumeration ();\r
+ CpuidExtendedTopology (CPUID_V2_EXTENDED_TOPOLOGY);\r
CpuidExtendedFunction ();\r
CpuidExtendedCpuSig ();\r
CpuidProcessorBrandString ();\r