ArmPkg/Library: Add ArmReadSctlr for AArch64

[mirror_edk2.git] / UefiCpuPkg / CpuMpPei / CpuMpPei.h

diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
index 7c8a218e0ee33aff8e4c95f3dff615709014152a..b2e578b96ab8e58004f5136433d0c38a1cbd1527 100644 (file)
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
@@ -1,7 +1,7 @@
 /** @file\r
   Definitions to install Multiple Processor PPI.\r
 \r
-  Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -21,6 +21,7 @@
 #include <Ppi/SecPlatformInformation.h>\r
 #include <Ppi/SecPlatformInformation2.h>\r
 #include <Ppi/EndOfPeiPhase.h>\r
+#include <Ppi/VectorHandoffInfo.h>\r
 \r
 #include <Register/Cpuid.h>\r
 #include <Register/LocalApic.h>\r
@@ -39,6 +40,7 @@
 #include <Library/TimerLib.h>\r
 #include <Library/UefiCpuLib.h>\r
 #include <Library/CpuLib.h>\r
+#include <Library/CpuExceptionHandlerLib.h>\r
 \r
 #include "Microcode.h"\r
 \r
@@ -64,8 +66,7 @@ typedef enum {
 //\r
 typedef struct {\r
   UINT8             *RendezvousFunnelAddress;\r
-  UINTN             PModeEntryOffset;\r
-  UINTN             LModeEntryOffset;\r
+  UINTN             ModeEntryOffset;\r
   UINTN             RendezvousFunnelSize;\r
 } MP_ASSEMBLY_ADDRESS_MAP;\r
 \r
@@ -83,25 +84,6 @@ typedef struct _PEI_CPU_MP_DATA  PEI_CPU_MP_DATA;
 \r
 #pragma pack(1)\r
 \r
-typedef union {\r
-  struct {\r
-    UINT32  LimitLow    : 16;\r
-    UINT32  BaseLow     : 16;\r
-    UINT32  BaseMid     : 8;\r
-    UINT32  Type        : 4;\r
-    UINT32  System      : 1;\r
-    UINT32  Dpl         : 2;\r
-    UINT32  Present     : 1;\r
-    UINT32  LimitHigh   : 4;\r
-    UINT32  Software    : 1;\r
-    UINT32  Reserved    : 1;\r
-    UINT32  DefaultSize : 1;\r
-    UINT32  Granularity : 1;\r
-    UINT32  BaseHigh    : 8;\r
-  } Bits;\r
-  UINT64  Uint64;\r
-} IA32_GDT;\r
-\r
 //\r
 // MP CPU exchange information for AP reset code\r
 // This structure is required to be packed because fixed field offsets\r
@@ -115,9 +97,10 @@ typedef struct {
   IA32_DESCRIPTOR       GdtrProfile;\r
   IA32_DESCRIPTOR       IdtrProfile;\r
   UINTN                 BufferStart;\r
-  UINTN                 PmodeOffset;\r
+  UINTN                 ModeOffset;\r
   UINTN                 NumApsExecuting;\r
-  UINTN                 LmodeOffset;\r
+  UINTN                 CodeSegment;\r
+  UINTN                 DataSegment;\r
   UINTN                 Cr3;\r
   PEI_CPU_MP_DATA       *PeiCpuMpData;\r
 } MP_CPU_EXCHANGE_INFO;\r
@@ -319,4 +302,14 @@ SecPlatformInformation2 (
      OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r
   );\r
 \r
+/**\r
+  Detect whether specified processor can find matching microcode patch and load it.\r
+\r
+  @param PeiCpuMpData        Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+MicrocodeDetect (\r
+  IN PEI_CPU_MP_DATA            *PeiCpuMpData\r
+  );\r
+\r
 #endif\r