Add generic HPET Timer DXE Driver and support libraries

[mirror_edk2.git] / UefiCpuPkg / Include / Library / LocalApicLib.h

diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h b/UefiCpuPkg/Include/Library/LocalApicLib.h
index d68e0e48b97f8769eaca42ac6d3c6bf339aae13d..52914fa9bdf97b7907b77f6b44870f3747b620f8 100644 (file)
--- a/UefiCpuPkg/Include/Library/LocalApicLib.h
+++ b/UefiCpuPkg/Include/Library/LocalApicLib.h
@@ -4,7 +4,7 @@
   Local APIC library assumes local APIC is enabled. It does not\r
   handles cases where local APIC is disabled.\r
 \r
-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -319,5 +319,54 @@ SendApicEoi (
   VOID\r
   );\r
 \r
+/**\r
+  Get the 32-bit address that a device should use to send a Message Signaled \r
+  Interrupt (MSI) to the Local APIC of the currently executing processor.\r
+\r
+  @return 32-bit address used to send an MSI to the Local APIC.\r
+**/\r
+UINT32\r
+EFIAPI    \r
+GetApicMsiAddress (\r
+  VOID\r
+  );\r
+    \r
+/**\r
+  Get the 64-bit data value that a device should use to send a Message Signaled \r
+  Interrupt (MSI) to the Local APIC of the currently executing processor.\r
+\r
+  If Vector is not in range 0x10..0xFE, then ASSERT().\r
+  If DeliveryMode is not supported, then ASSERT().\r
+  \r
+  @param  Vector          The 8-bit interrupt vector associated with the MSI.  \r
+                          Must be in the range 0x10..0xFE\r
+  @param  DeliveryMode    A 3-bit value that specifies how the recept of the MSI \r
+                          is handled.  The only supported values are:\r
+                            0: LOCAL_APIC_DELIVERY_MODE_FIXED\r
+                            1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY\r
+                            2: LOCAL_APIC_DELIVERY_MODE_SMI\r
+                            4: LOCAL_APIC_DELIVERY_MODE_NMI\r
+                            5: LOCAL_APIC_DELIVERY_MODE_INIT\r
+                            7: LOCAL_APIC_DELIVERY_MODE_EXTINT\r
+                          \r
+  @param  LevelTriggered  TRUE specifies a level triggered interrupt.  \r
+                          FALSE specifies an edge triggered interrupt.\r
+  @param  AssertionLevel  Ignored if LevelTriggered is FALSE.\r
+                          TRUE specifies a level triggered interrupt that active \r
+                          when the interrupt line is asserted.\r
+                          FALSE specifies a level triggered interrupt that active \r
+                          when the interrupt line is deasserted.\r
+\r
+  @return 64-bit data value used to send an MSI to the Local APIC.\r
+**/\r
+UINT64\r
+EFIAPI    \r
+GetApicMsiValue (\r
+  IN UINT8    Vector,\r
+  IN UINTN    DeliveryMode,\r
+  IN BOOLEAN  LevelTriggered,\r
+  IN BOOLEAN  AssertionLevel\r
+  );\r
+  \r
 #endif\r
 \r