UefiCpuPkg/Msr: Add CPUID signature check MACROs

[mirror_edk2.git] / UefiCpuPkg / Include / Register / Msr / BroadwellMsr.h

diff --git a/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h b/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h
index 1c3c2dc474838b341633e925b8e45ffce8a62238..90bd523c99e6b57c66e1b7cc26dbb7287de5512b 100644 (file)
--- a/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h
@@ -6,7 +6,7 @@
   returned is a single 32-bit or 64-bit value, then a data structure is not\r
   provided for that MSR.\r
 \r
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -26,6 +26,25 @@
 \r
 #include <Register/ArchitecturalMsr.h>\r
 \r
+/**\r
+  Is Intel processors based on the Broadwell microarchitecture?\r
+\r
+  @param   DisplayFamily  Display Family ID\r
+  @param   DisplayModel   Display Model ID\r
+\r
+  @retval  TRUE   Yes, it is.\r
+  @retval  FALSE  No, it isn't.\r
+**/\r
+#define IS_BROADWELL_PROCESSOR(DisplayFamily, DisplayModel) \\r
+  (DisplayFamily == 0x06 && \\r
+   (                        \\r
+    DisplayModel == 0x3D || \\r
+    DisplayModel == 0x47 || \\r
+    DisplayModel == 0x4F || \\r
+    DisplayModel == 0x56    \\r
+    )                       \\r
+   )\r
+\r
 /**\r
   Thread. See Table 35-2. See Section 18.4.2, "Global Counter Control\r
   Facilities.".\r