UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA

[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / Ia32 / ArchExceptionHandler.c

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index f13e8e70206ec7c9a823236c9a1c1f95934c1beb..194d3a499b264818450970415fa18bb74c6acfc2 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
 /** @file\r
   IA32 CPU Exception Handler functons.\r
 \r
-  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -132,16 +132,15 @@ ArchSetupExceptionStack (
   EXCEPTION_HANDLER_TEMPLATE_MAP  TemplateMap;\r
 \r
   if ((StackSwitchData == NULL) ||\r
-      (StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV) ||\r
-      (StackSwitchData->Ia32.KnownGoodStackTop == 0) ||\r
-      (StackSwitchData->Ia32.KnownGoodStackSize == 0) ||\r
-      (StackSwitchData->Ia32.StackSwitchExceptions == NULL) ||\r
-      (StackSwitchData->Ia32.StackSwitchExceptionNumber == 0) ||\r
-      (StackSwitchData->Ia32.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||\r
-      (StackSwitchData->Ia32.GdtTable == NULL) ||\r
-      (StackSwitchData->Ia32.IdtTable == NULL) ||\r
-      (StackSwitchData->Ia32.ExceptionTssDesc == NULL) ||\r
-      (StackSwitchData->Ia32.ExceptionTss == NULL))\r
+      (StackSwitchData->KnownGoodStackTop == 0) ||\r
+      (StackSwitchData->KnownGoodStackSize == 0) ||\r
+      (StackSwitchData->StackSwitchExceptions == NULL) ||\r
+      (StackSwitchData->StackSwitchExceptionNumber == 0) ||\r
+      (StackSwitchData->StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||\r
+      (StackSwitchData->GdtTable == NULL) ||\r
+      (StackSwitchData->IdtTable == NULL) ||\r
+      (StackSwitchData->ExceptionTssDesc == NULL) ||\r
+      (StackSwitchData->ExceptionTss == NULL))\r
   {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -151,16 +150,16 @@ ArchSetupExceptionStack (
   // one or newly allocated, has enough space to hold descriptors for exception\r
   // task-state segments.\r
   //\r
-  if (((UINTN)StackSwitchData->Ia32.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {\r
+  if (((UINTN)StackSwitchData->GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc < (UINTN)(StackSwitchData->Ia32.GdtTable)) {\r
+  if ((UINTN)StackSwitchData->ExceptionTssDesc < (UINTN)(StackSwitchData->GdtTable)) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc + StackSwitchData->Ia32.ExceptionTssDescSize >\r
-      ((UINTN)(StackSwitchData->Ia32.GdtTable) + StackSwitchData->Ia32.GdtTableSize))\r
+  if ((UINTN)StackSwitchData->ExceptionTssDesc + StackSwitchData->ExceptionTssDescSize >\r
+      ((UINTN)(StackSwitchData->GdtTable) + StackSwitchData->GdtTableSize))\r
   {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -169,20 +168,20 @@ ArchSetupExceptionStack (
   // We need one descriptor and one TSS for current task and every exception\r
   // specified.\r
   //\r
-  if (StackSwitchData->Ia32.ExceptionTssDescSize <\r
-      sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1))\r
+  if (StackSwitchData->ExceptionTssDescSize <\r
+      sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->StackSwitchExceptionNumber + 1))\r
   {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  if (StackSwitchData->Ia32.ExceptionTssSize <\r
-      sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1))\r
+  if (StackSwitchData->ExceptionTssSize <\r
+      sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->StackSwitchExceptionNumber + 1))\r
   {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  TssDesc = StackSwitchData->Ia32.ExceptionTssDesc;\r
-  Tss     = StackSwitchData->Ia32.ExceptionTss;\r
+  TssDesc = StackSwitchData->ExceptionTssDesc;\r
+  Tss     = StackSwitchData->ExceptionTss;\r
 \r
   //\r
   // Initialize new GDT table and/or IDT table, if any\r
@@ -192,20 +191,20 @@ ArchSetupExceptionStack (
 \r
   GdtSize = (UINTN)TssDesc +\r
             sizeof (IA32_TSS_DESCRIPTOR) *\r
-            (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1) -\r
-            (UINTN)(StackSwitchData->Ia32.GdtTable);\r
-  if ((UINTN)StackSwitchData->Ia32.GdtTable != Gdtr.Base) {\r
-    CopyMem (StackSwitchData->Ia32.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);\r
-    Gdtr.Base  = (UINTN)StackSwitchData->Ia32.GdtTable;\r
+            (StackSwitchData->StackSwitchExceptionNumber + 1) -\r
+            (UINTN)(StackSwitchData->GdtTable);\r
+  if ((UINTN)StackSwitchData->GdtTable != Gdtr.Base) {\r
+    CopyMem (StackSwitchData->GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);\r
+    Gdtr.Base  = (UINTN)StackSwitchData->GdtTable;\r
     Gdtr.Limit = (UINT16)GdtSize - 1;\r
   }\r
 \r
-  if ((UINTN)StackSwitchData->Ia32.IdtTable != Idtr.Base) {\r
-    Idtr.Base = (UINTN)StackSwitchData->Ia32.IdtTable;\r
+  if ((UINTN)StackSwitchData->IdtTable != Idtr.Base) {\r
+    Idtr.Base = (UINTN)StackSwitchData->IdtTable;\r
   }\r
 \r
-  if (StackSwitchData->Ia32.IdtTableSize > 0) {\r
-    Idtr.Limit = (UINT16)(StackSwitchData->Ia32.IdtTableSize - 1);\r
+  if (StackSwitchData->IdtTableSize > 0) {\r
+    Idtr.Limit = (UINT16)(StackSwitchData->IdtTableSize - 1);\r
   }\r
 \r
   //\r
@@ -227,10 +226,10 @@ ArchSetupExceptionStack (
   // Fixup exception task descriptor and task-state segment\r
   //\r
   AsmGetTssTemplateMap (&TemplateMap);\r
-  StackTop = StackSwitchData->Ia32.KnownGoodStackTop - CPU_STACK_ALIGNMENT;\r
+  StackTop = StackSwitchData->KnownGoodStackTop - CPU_STACK_ALIGNMENT;\r
   StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);\r
-  IdtTable = StackSwitchData->Ia32.IdtTable;\r
-  for (Index = 0; Index < StackSwitchData->Ia32.StackSwitchExceptionNumber; ++Index) {\r
+  IdtTable = StackSwitchData->IdtTable;\r
+  for (Index = 0; Index < StackSwitchData->StackSwitchExceptionNumber; ++Index) {\r
     TssDesc += 1;\r
     Tss     += 1;\r
 \r
@@ -251,7 +250,7 @@ ArchSetupExceptionStack (
     //\r
     // Fixup TSS\r
     //\r
-    Vector = StackSwitchData->Ia32.StackSwitchExceptions[Index];\r
+    Vector = StackSwitchData->StackSwitchExceptions[Index];\r
     if ((Vector >= CPU_EXCEPTION_NUM) ||\r
         (Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)))\r
     {\r
@@ -271,7 +270,7 @@ ArchSetupExceptionStack (
     Tss->FS     = AsmReadFs ();\r
     Tss->GS     = AsmReadGs ();\r
 \r
-    StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;\r
+    StackTop -= StackSwitchData->KnownGoodStackSize;\r
 \r
     //\r
     // Update IDT to use Task Gate for given exception\r
@@ -291,7 +290,7 @@ ArchSetupExceptionStack (
   //\r
   // Load current task\r
   //\r
-  AsmWriteTr ((UINT16)((UINTN)StackSwitchData->Ia32.ExceptionTssDesc - Gdtr.Base));\r
+  AsmWriteTr ((UINT16)((UINTN)StackSwitchData->ExceptionTssDesc - Gdtr.Base));\r
 \r
   //\r
   // Publish IDT\r