ArmPkg/Library: Add ArmReadSctlr for AArch64

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / PiSmmCpuDxeSmm.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 949dd4e5c1e7519edbbc8cacaa03c4454ea9ca13..dbe63ee9d2a0ea93ec689ec449b832313d70f431 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -1,7 +1,7 @@
 /** @file\r
 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r
 \r
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -96,6 +96,11 @@ UINTN mNumberOfCpus = 1;
 //\r
 BOOLEAN mSmmReadyToLock = FALSE;\r
 \r
+//\r
+// S3 boot flag\r
+//\r
+BOOLEAN mSmmS3Flag = FALSE;\r
+\r
 //\r
 // Global used to cache PCD for SMM Code Access Check enable\r
 //\r
@@ -104,7 +109,7 @@ BOOLEAN                  mSmmCodeAccessCheckEnable = FALSE;
 //\r
 // Spin lock used to serialize setting of SMM Code Access Check feature\r
 //\r
-SPIN_LOCK                mConfigSmmCodeAccessCheckLock;\r
+SPIN_LOCK                *mConfigSmmCodeAccessCheckLock = NULL;\r
 \r
 /**\r
   Initialize IDT to setup exception handlers for SMM.\r
@@ -246,7 +251,7 @@ SmmReadSaveState (
     // the pseudo register value for EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID is returned in Buffer.\r
     // Otherwise, EFI_NOT_FOUND is returned.\r
     //\r
-    if (mSmmMpSyncData->CpuData[CpuIndex].Present) {\r
+    if (*(mSmmMpSyncData->CpuData[CpuIndex].Present)) {\r
       *(UINT64 *)Buffer = gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId;\r
       return EFI_SUCCESS;\r
     } else {\r
@@ -254,7 +259,7 @@ SmmReadSaveState (
     }\r
   }\r
 \r
-  if (!mSmmMpSyncData->CpuData[CpuIndex].Present) {\r
+  if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -350,6 +355,13 @@ SmmInitHandler (
         &mCpuHotPlugData\r
         );\r
 \r
+      if (!mSmmS3Flag) {\r
+        //\r
+        // Check XD and BTS features on each processor on normal boot\r
+        //\r
+        CheckFeatureSupported ();\r
+      }\r
+\r
       if (mIsBsp) {\r
         //\r
         // BSP rebase is already done above.\r
@@ -485,6 +497,10 @@ SmmRestoreCpu (
 \r
   DEBUG ((EFI_D_INFO, "SmmRestoreCpu()\n"));\r
 \r
+  mSmmS3Flag = TRUE;\r
+\r
+  InitializeSpinLock (mMemoryMappedLock);\r
+\r
   //\r
   // See if there is enough context to resume PEI Phase\r
   //\r
@@ -1182,11 +1198,6 @@ PiCpuSmmEntry (
     }\r
   }\r
 \r
-  //\r
-  // Check XD and BTS features\r
-  //\r
-  CheckProcessorFeature ();\r
-\r
   //\r
   // Initialize SMM Profile feature\r
   //\r
@@ -1338,7 +1349,7 @@ ConfigSmmCodeAccessCheckOnCurrentProcessor (
   //\r
   // Release the spin lock user to serialize the updates to the SMM Feature Control MSR\r
   //\r
-  ReleaseSpinLock (&mConfigSmmCodeAccessCheckLock);\r
+  ReleaseSpinLock (mConfigSmmCodeAccessCheckLock);\r
 }\r
 \r
 /**\r
@@ -1374,13 +1385,13 @@ ConfigSmmCodeAccessCheck (
   //\r
   // Initialize the lock used to serialize the MSR programming in BSP and all APs\r
   //\r
-  InitializeSpinLock (&mConfigSmmCodeAccessCheckLock);\r
+  InitializeSpinLock (mConfigSmmCodeAccessCheckLock);\r
 \r
   //\r
   // Acquire Config SMM Code Access Check spin lock.  The BSP will release the\r
   // spin lock when it is done executing ConfigSmmCodeAccessCheckOnCurrentProcessor().\r
   //\r
-  AcquireSpinLock (&mConfigSmmCodeAccessCheckLock);\r
+  AcquireSpinLock (mConfigSmmCodeAccessCheckLock);\r
 \r
   //\r
   // Enable SMM Code Access Check feature on the BSP.\r
@@ -1397,7 +1408,7 @@ ConfigSmmCodeAccessCheck (
       // Acquire Config SMM Code Access Check spin lock.  The AP will release the\r
       // spin lock when it is done executing ConfigSmmCodeAccessCheckOnCurrentProcessor().\r
       //\r
-      AcquireSpinLock (&mConfigSmmCodeAccessCheckLock);\r
+      AcquireSpinLock (mConfigSmmCodeAccessCheckLock);\r
 \r
       //\r
       // Call SmmStartupThisAp() to enable SMM Code Access Check on an AP.\r
@@ -1408,14 +1419,14 @@ ConfigSmmCodeAccessCheck (
       //\r
       // Wait for the AP to release the Config SMM Code Access Check spin lock.\r
       //\r
-      while (!AcquireSpinLockOrFail (&mConfigSmmCodeAccessCheckLock)) {\r
+      while (!AcquireSpinLockOrFail (mConfigSmmCodeAccessCheckLock)) {\r
         CpuPause ();\r
       }\r
 \r
       //\r
       // Release the Config SMM Code Access Check spin lock.\r
       //\r
-      ReleaseSpinLock (&mConfigSmmCodeAccessCheckLock);\r
+      ReleaseSpinLock (mConfigSmmCodeAccessCheckLock);\r
     }\r
   }\r
 }\r
@@ -1496,6 +1507,15 @@ PerformPreTasks (
   // Restore SMM Configuration in S3 boot path.\r
   //\r
   if (mRestoreSmmConfigurationInS3) {\r
+    //\r
+    // Need make sure gSmst is correct because below function may use them.\r
+    //\r
+    gSmst->SmmStartupThisAp      = gSmmCpuPrivate->SmmCoreEntryContext.SmmStartupThisAp;\r
+    gSmst->CurrentlyExecutingCpu = gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu;\r
+    gSmst->NumberOfCpus          = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
+    gSmst->CpuSaveStateSize      = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveStateSize;\r
+    gSmst->CpuSaveState          = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveState;\r
+\r
     //\r
     // Configure SMM Code Access Check feature if available.\r
     //\r