ArmPlatformPkg/PL011SerialPortLib: use untyped PCD for register base

[mirror_edk2.git] / UefiCpuPkg / SecCore / SecMain.c

diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
index e9e243ca0585594d480527f5bdfda0dad681d724..b24e190617764ed244344b21dc071303110225e3 100644 (file)
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -1,7 +1,7 @@
 /** @file\r
   C functions in SEC\r
 \r
-  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -113,6 +113,7 @@ SecPerformancePpiCallBack (
   @param BootFirmwareVolume  Base address of the Boot Firmware Volume.\r
 **/\r
 VOID\r
+NORETURN\r
 EFIAPI\r
 SecStartup (\r
   IN UINT32                   SizeOfRam,\r
@@ -189,7 +190,7 @@ SecStartup (
   //\r
   SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
-  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);\r
+  SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
   SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
   SecCoreData.TemporaryRamSize       = SizeOfRam;\r
   SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
@@ -201,6 +202,11 @@ SecStartup (
   // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
   //\r
   InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
+\r
+  //\r
+  // Should not come here.\r
+  //\r
+  UNREACHABLE ();\r
 }\r
 \r
 /**\r
@@ -281,7 +287,7 @@ SecStartupPhase2(
     // will be built based on them in PEI phase.\r
     //\r
     SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
-    SecCoreData->PeiTemporaryRamSize &= ~0x07;\r
+    SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
   } else {\r
     //\r
     // No addition PPI, PpiList directly point to the common PPI list.\r