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2dbcb8f)
The denomination 'Normal' was used to make reference to the 'Normal'
or 'Non Secure' or 'Non Trusted' world.
To avoid confusion, this prefix has been removed from PCDs to define
the normal world.
The PCDs explicitely related to the Secure/Trusted World continue to
have the 'Sec' prefix.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12416
6f19259b-4bc3-4df7-8a09-
765794883524
32 files changed:
#\r
# ARM Normal (or Non Secure) Firmware PCDs\r
#\r
#\r
# ARM Normal (or Non Secure) Firmware PCDs\r
#\r
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B\r
- gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress|0|UINT32|0x0000002D\r
- gArmTokenSpaceGuid.PcdNormalFvSize|0|UINT32|0x0000002E\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B\r
+ gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D\r
+ gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
\r
# System Memory (DRAM): These PCDs define the region of in-built system memory\r
# Some platforms can get DRAM extensions, these additional regions will be declared\r
\r
# System Memory (DRAM): These PCDs define the region of in-built system memory\r
# Some platforms can get DRAM extensions, these additional regions will be declared\r
//\r
// Get the PrePi or PrePeiCore module (defined as SEC type module)\r
//\r
//\r
// Get the PrePi or PrePeiCore module (defined as SEC type module)\r
//\r
- Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdNormalFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);\r
+ Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);\r
if (!EFI_ERROR(Status)) {\r
Status = GetImageContext (FfsHeader,&ImageContext);\r
if (!EFI_ERROR(Status)) {\r
if (!EFI_ERROR(Status)) {\r
Status = GetImageContext (FfsHeader,&ImageContext);\r
if (!EFI_ERROR(Status)) {\r
//\r
// Get the PeiCore module (defined as PEI_CORE type module)\r
//\r
//\r
// Get the PeiCore module (defined as PEI_CORE type module)\r
//\r
- Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdNormalFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);\r
+ Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);\r
if (!EFI_ERROR(Status)) {\r
Status = GetImageContext (FfsHeader,&ImageContext);\r
if (!EFI_ERROR(Status)) {\r
if (!EFI_ERROR(Status)) {\r
Status = GetImageContext (FfsHeader,&ImageContext);\r
if (!EFI_ERROR(Status)) {\r
\r
[Pcd]\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress\r
\r
[Pcd]\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
-BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress
-Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize
+BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdFdBaseAddress
+Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize
ErasePolarity = 1
BlockSize = 0x00010000
NumBlocks = 0x20
ErasePolarity = 1
BlockSize = 0x00010000
NumBlocks = 0x20
FV = FVMAIN_SEC
0x00050000|0x00100000
FV = FVMAIN_SEC
0x00050000|0x00100000
-gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvSize
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
################################################################################
FV = FVMAIN_COMPACT
################################################################################
\r
\r
[FD.ArmRealViewEb_EFI]\r
\r
\r
[FD.ArmRealViewEb_EFI]\r
-BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
-Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize\r
+BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdFdBaseAddress\r
+Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize\r
ErasePolarity = 1\r
BlockSize = 0x00010000\r
NumBlocks = 0x20\r
ErasePolarity = 1\r
BlockSize = 0x00010000\r
NumBlocks = 0x20\r
FV = FVMAIN_SEC\r
\r
0x00050000|0x00100000\r
FV = FVMAIN_SEC\r
\r
0x00050000|0x00100000\r
-gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvSize\r
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
FV = FVMAIN_COMPACT\r
\r
################################################################################\r
FV = FVMAIN_COMPACT\r
\r
################################################################################\r
OUT UINTN* JumpAddress
)
{
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);
gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
\r
[FixedPcd]\r
gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
\r
[FixedPcd]\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
[FD.ArmVExpress_EFI]
!if $(EDK2_ARMVE_STANDALONE) == 1
[FD.ArmVExpress_EFI]
!if $(EDK2_ARMVE_STANDALONE) == 1
-BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in NOR Flash.
+BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in remapped DRAM.
+BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
+Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
################################################################################
0x00000000|0x00200000
################################################################################
0x00000000|0x00200000
-gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvBaseSize
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
# Firmware Device / Volume\r
gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware Device \r
gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware Device.\r
# Firmware Device / Volume\r
gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware Device \r
gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware Device.\r
-gArmTokenSpaceGuid.PcdNormalFdBaseAddress : Base Address of your Non-Secure/Normal World Firmware Device.\r
-gArmTokenSpaceGuid.PcdNormalFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device \r
+gArmTokenSpaceGuid.PcdFdBaseAddress : Base Address of your Non-Secure/Normal World Firmware Device.\r
+gArmTokenSpaceGuid.PcdFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device \r
\r
# Stacks\r
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World\r
\r
# Stacks\r
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World\r
VOID (*secondary_start)(VOID);\r
\r
// The secondary cores will execute the firmware once wake from WFI.\r
VOID (*secondary_start)(VOID);\r
\r
// The secondary cores will execute the firmware once wake from WFI.\r
- secondary_start = (VOID (*)())PcdGet32(PcdNormalFvBaseAddress);\r
+ secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);\r
\r
if (FeaturePcdGet (PcdStandalone) == FALSE) {\r
if (IS_PRIMARY_CORE(MpId)) {\r
\r
if (FeaturePcdGet (PcdStandalone) == FALSE) {\r
if (IS_PRIMARY_CORE(MpId)) {\r
- UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);\r
+ UINTN* StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);\r
\r
// Patch the DRAM to make an infinite loop at the start address\r
*StartAddress = 0xEAFFFFFE; // opcode for while(1)\r
\r
// Patch the DRAM to make an infinite loop at the start address\r
*StartAddress = 0xEAFFFFFE; // opcode for while(1)\r
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);\r
SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
\r
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);\r
SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
\r
- *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);\r
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);\r
} else {\r
// When the primary core is stopped by the hardware debugger to copy the firmware\r
// into DRAM. The secondary cores are still running. As soon as the first bytes of\r
} else {\r
// When the primary core is stopped by the hardware debugger to copy the firmware\r
// into DRAM. The secondary cores are still running. As soon as the first bytes of\r
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
\r
// To enter into Non Secure state, we need to make a return from exception\r
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
\r
// To enter into Non Secure state, we need to make a return from exception\r
- *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);\r
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);\r
} else {\r
// We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary\r
// cores would make crash the system by setting their stacks in DRAM before the primary core has not\r
} else {\r
// We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary\r
// cores would make crash the system by setting their stacks in DRAM before the primary core has not\r
*JumpAddress = (UINTN)NonSecureWaitForFirmware;\r
}\r
} else {\r
*JumpAddress = (UINTN)NonSecureWaitForFirmware;\r
}\r
} else {\r
- *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);\r
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);\r
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[FixedPcd]
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress
+ gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
);\r
\r
SystemMemoryTop = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize);\r
);\r
\r
SystemMemoryTop = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize);\r
- FdTop = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);\r
+ FdTop = PcdGet32(PcdFdBaseAddress) + PcdGet32(PcdFdSize);\r
\r
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE\r
// core to overwrite this area we must mark the region with the attribute non-present\r
\r
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE\r
// core to overwrite this area we must mark the region with the attribute non-present\r
- if ((PcdGet32 (PcdNormalFdBaseAddress) >= PcdGet32 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {\r
+ if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet32 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {\r
Found = FALSE;\r
\r
// Search for System Memory Hob that contains the firmware\r
NextHob.Raw = GetHobList ();\r
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {\r
if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
Found = FALSE;\r
\r
// Search for System Memory Hob that contains the firmware\r
NextHob.Raw = GetHobList ();\r
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {\r
if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
- (PcdGet32(PcdNormalFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&\r
+ (PcdGet32(PcdFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&\r
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))\r
{\r
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;\r
ResourceLength = NextHob.ResourceDescriptor->ResourceLength;\r
ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;\r
\r
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))\r
{\r
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;\r
ResourceLength = NextHob.ResourceDescriptor->ResourceLength;\r
ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;\r
\r
- if (PcdGet32(PcdNormalFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {\r
+ if (PcdGet32(PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {\r
if (SystemMemoryTop == FdTop) {\r
NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT;\r
} else {\r
// Create the System Memory HOB for the firmware with the non-present attribute\r
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
if (SystemMemoryTop == FdTop) {\r
NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT;\r
} else {\r
// Create the System Memory HOB for the firmware with the non-present attribute\r
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
- PcdGet32(PcdNormalFdBaseAddress),\r
- PcdGet32(PcdNormalFdSize));\r
+ PcdGet32(PcdFdBaseAddress),\r
+ PcdGet32(PcdFdSize));\r
\r
// Top of the FD is system memory available for UEFI\r
\r
// Top of the FD is system memory available for UEFI\r
- NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdNormalFdSize);\r
- NextHob.ResourceDescriptor->ResourceLength -= PcdGet32(PcdNormalFdSize);\r
+ NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdFdSize);\r
+ NextHob.ResourceDescriptor->ResourceLength -= PcdGet32(PcdFdSize);\r
}\r
} else {\r
// Create the System Memory HOB for the firmware with the non-present attribute\r
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
}\r
} else {\r
// Create the System Memory HOB for the firmware with the non-present attribute\r
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
- PcdGet32(PcdNormalFdBaseAddress),\r
- PcdGet32(PcdNormalFdSize));\r
+ PcdGet32(PcdFdBaseAddress),\r
+ PcdGet32(PcdFdSize));\r
- NextHob.ResourceDescriptor->ResourceLength = PcdGet32(PcdNormalFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;\r
+ NextHob.ResourceDescriptor->ResourceLength = PcdGet32(PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;\r
\r
// If there is some memory available on the top of the FD then create a HOB\r
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {\r
\r
// If there is some memory available on the top of the FD then create a HOB\r
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {\r
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
[FixedPcd]
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress
- gArmTokenSpaceGuid.PcdNormalFdSize
+ gArmTokenSpaceGuid.PcdFdBaseAddress
+ gArmTokenSpaceGuid.PcdFdSize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
\r
SystemMemoryBase = (UINTN)FixedPcdGet32 (PcdSystemMemoryBase);\r
SystemMemoryTop = SystemMemoryBase + (UINTN)FixedPcdGet32 (PcdSystemMemorySize);\r
\r
SystemMemoryBase = (UINTN)FixedPcdGet32 (PcdSystemMemoryBase);\r
SystemMemoryTop = SystemMemoryBase + (UINTN)FixedPcdGet32 (PcdSystemMemorySize);\r
- FdBase = (UINTN)PcdGet32 (PcdNormalFdBaseAddress);\r
- FdTop = FdBase + (UINTN)PcdGet32 (PcdNormalFdSize);\r
+ FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress);\r
+ FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);\r
\r
//\r
// Initialize the System Memory (DRAM)\r
\r
//\r
// Initialize the System Memory (DRAM)\r
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
\r
[FixedPcd]\r
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
\r
[FixedPcd]\r
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFdSize\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress\r
+ gArmTokenSpaceGuid.PcdFdSize\r
\r
gArmTokenSpaceGuid.PcdSystemMemoryBase\r
gArmTokenSpaceGuid.PcdSystemMemorySize\r
\r
gArmTokenSpaceGuid.PcdSystemMemoryBase\r
gArmTokenSpaceGuid.PcdSystemMemorySize\r
\r
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
\r
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
- BuildFvHob (PcdGet32(PcdNormalFvBaseAddress), PcdGet32(PcdNormalFvSize));\r
+ BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));\r
\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
[FixedPcd]
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
[FixedPcd]
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress
- gArmTokenSpaceGuid.PcdNormalFdSize
+ gArmTokenSpaceGuid.PcdFdBaseAddress
+ gArmTokenSpaceGuid.PcdFdSize
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress
- gArmTokenSpaceGuid.PcdNormalFvSize
+ gArmTokenSpaceGuid.PcdFvBaseAddress
+ gArmTokenSpaceGuid.PcdFvSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED\r
\r
[FixedPcd]\r
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED\r
\r
[FixedPcd]\r
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFdSize\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress\r
+ gArmTokenSpaceGuid.PcdFdSize\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvSize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvSize\r
\r
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize\r
\r
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);\r
- SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);\r
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);\r
+ SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)\r
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);\r
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)\r
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);\r
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);\r
- SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);\r
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);\r
+ SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)\r
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);\r
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)\r
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);\r
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
\r
_PrepareArguments:\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
\r
_PrepareArguments:\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
add r2, r2, #4\r
ldr r1, [r2]\r
\r
add r2, r2, #4\r
ldr r1, [r2]\r
\r
\r
_PrepareArguments\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
\r
_PrepareArguments\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
add r2, r2, #4\r
ldr r1, [r2]\r
\r
add r2, r2, #4\r
ldr r1, [r2]\r
\r
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores\r
\r
[FixedPcd]\r
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores\r
\r
[FixedPcd]\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvSize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvSize\r
\r
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
gArmTokenSpaceGuid.PcdArmPrimaryCore\r
\r
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
gArmTokenSpaceGuid.PcdArmPrimaryCore\r
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores\r
\r
[FixedPcd]\r
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores\r
\r
[FixedPcd]\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvSize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvSize\r
\r
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
gArmTokenSpaceGuid.PcdArmPrimaryCore\r
\r
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
gArmTokenSpaceGuid.PcdArmPrimaryCore\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)\r
- add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
+ add r3, r3, r2 // r4 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)\r
- add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
+ add r3, r3, r2 // r4 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
[FixedPcd]\r
gArmTokenSpaceGuid.PcdVFPEnabled\r
\r
[FixedPcd]\r
gArmTokenSpaceGuid.PcdVFPEnabled\r
\r
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFdSize\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress\r
+ gArmTokenSpaceGuid.PcdFdSize\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvSize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvSize\r
\r
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase\r
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\r
\r
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase\r
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\r
[FixedPcd]\r
gArmTokenSpaceGuid.PcdVFPEnabled\r
\r
[FixedPcd]\r
gArmTokenSpaceGuid.PcdVFPEnabled\r
\r
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFdSize\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress\r
+ gArmTokenSpaceGuid.PcdFdSize\r
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
- gArmTokenSpaceGuid.PcdNormalFvSize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdFvSize\r
\r
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\r
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize\r
\r
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\r
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize\r
copy_cpsr_into_spsr ();
}
copy_cpsr_into_spsr ();
}
- JumpAddress = PcdGet32 (PcdNormalFvBaseAddress);
+ JumpAddress = PcdGet32 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
return_from_exception (JumpAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
return_from_exception (JumpAddress);
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress
+ gArmTokenSpaceGuid.PcdFvBaseAddress
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize
-BaseAddress = 0x80008000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress #The base address of the FLASH Device.
-Size = 0x00080000|gArmTokenSpaceGuid.PcdNormalFdSize #The size in bytes of the FLASH Device
+BaseAddress = 0x80008000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device.
+Size = 0x00080000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device
ErasePolarity = 1
BlockSize = 0x1
NumBlocks = 0x80000
ErasePolarity = 1
BlockSize = 0x1
NumBlocks = 0x80000
0x00000208|0x0007FDF8
!endif
0x00000208|0x0007FDF8
!endif
-gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvBaseSize
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
FV = FVMAIN_COMPACT
################################################################################
FV = FVMAIN_COMPACT
################################################################################
gEmbeddedTokenSpaceGuid.PcdCacheEnable
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
[FixedPcd]
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress
- gArmTokenSpaceGuid.PcdNormalFdSize
+ gArmTokenSpaceGuid.PcdFdBaseAddress
+ gArmTokenSpaceGuid.PcdFdSize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize