Architecturally, the TTBCR register value is undefined at reset for
Non-Secure.
On some platforms the reset value for TTBCR is not zero and
this causes a data abort exception once the MMU is enabled.
This patch configures the TTBCR register to enable translation table
walk using TTBR0.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
/** @file\r
\r
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
/** @file\r
\r
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
IN VOID *TranslationTableBase\r
);\r
\r
IN VOID *TranslationTableBase\r
);\r
\r
+VOID\r
+EFIAPI\r
+ArmSetTTBCR (\r
+ IN UINT32 Bits\r
+ );\r
+\r
VOID *\r
EFIAPI\r
ArmGetTTBR0BaseAddress (\r
VOID *\r
EFIAPI\r
ArmGetTTBR0BaseAddress (\r
/** @file\r
* File managing the MMU for ARMv7 architecture\r
*\r
/** @file\r
* File managing the MMU for ARMv7 architecture\r
*\r
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2016, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
\r
ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
\r
\r
ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
\r
+ //\r
+ // The TTBCR register value is undefined at reset in the Non-Secure world.\r
+ // Writing 0 has the effect of:\r
+ // Clearing EAE: Use short descriptors, as mandated by specification.\r
+ // Clearing PD0 and PD1: Translation Table Walk Disable is off.\r
+ // Clearing N: Perform all translation table walks through TTBR0.\r
+ // (0 is the default reset value in systems not implementing\r
+ // the Security Extensions.)\r
+ //\r
+ ArmSetTTBCR (0);\r
+\r
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r
DOMAIN_ACCESS_CONTROL_NONE(14) |\r
DOMAIN_ACCESS_CONTROL_NONE(13) |\r
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r
DOMAIN_ACCESS_CONTROL_NONE(14) |\r
DOMAIN_ACCESS_CONTROL_NONE(13) |\r
#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
GCC_ASM_EXPORT(ArmGetFiqState)\r
GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)\r
GCC_ASM_EXPORT(ArmSetTTBR0)\r
GCC_ASM_EXPORT(ArmGetFiqState)\r
GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)\r
GCC_ASM_EXPORT(ArmSetTTBR0)\r
+GCC_ASM_EXPORT(ArmSetTTBCR)\r
GCC_ASM_EXPORT(ArmSetDomainAccessControl)\r
GCC_ASM_EXPORT(CPSRMaskInsert)\r
GCC_ASM_EXPORT(CPSRRead)\r
GCC_ASM_EXPORT(ArmSetDomainAccessControl)\r
GCC_ASM_EXPORT(CPSRMaskInsert)\r
GCC_ASM_EXPORT(CPSRRead)\r
+ASM_PFX(ArmSetTTBCR):\r
+ mcr p15, 0, r0, c2, c0, 2\r
+ isb\r
+ bx lr\r
+\r
ASM_PFX(ArmGetTTBR0BaseAddress):\r
mrc p15,0,r0,c2,c0,0\r
LoadConstantToReg(0xFFFFC000, r1)\r
ASM_PFX(ArmGetTTBR0BaseAddress):\r
mrc p15,0,r0,c2,c0,0\r
LoadConstantToReg(0xFFFFC000, r1)\r
//------------------------------------------------------------------------------\r
//\r
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
//------------------------------------------------------------------------------\r
//\r
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
+ RVCT_ASM_EXPORT ArmSetTTBCR\r
+ mcr p15, 0, r0, c2, c0, 2\r
+ isb\r
+ bx lr\r
+\r
RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress\r
mrc p15,0,r0,c2,c0,0\r
LoadConstantToReg(0xFFFFC000, r1)\r
RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress\r
mrc p15,0,r0,c2,c0,0\r
LoadConstantToReg(0xFFFFC000, r1)\r