UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5715] Stuff RSB before RSM

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1093

Return Stack Buffer (RSB) is used to predict the target of RET
instructions. When the RSB underflows, some processors may fall back to
using branch predictors. This might impact software using the retpoline
mitigation strategy on those processors.

This commit will add RSB stuffing logic before returning from SMM (the RSM
instruction) to avoid interfering with non-SMM usage of the retpoline
technique.

After the stuffing, RSB entries will contain a trap like:

@SpecTrap:
    pause
    lfence
    jmp     @SpecTrap

A more detailed explanation of the purpose of commit is under the
'Branch target injection mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

Please note that this commit requires further actions (BZ 1091) to remove
the duplicated 'StuffRsb.inc' files and merge them into one under a
UefiCpuPkg package-level directory (such as UefiCpuPkg/Include/).

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1091

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
index 509e7a0a665fbc1ead1897955fcdbe44af7cbf5e..6bbc339c53b7fafddc0f0662da110d7cd740b857 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
@@ -18,6 +18,8 @@
 ;\r
 ;-------------------------------------------------------------------------------\r
 \r
+%include "StuffRsb.inc"\r
+\r
 %define MSR_IA32_MISC_ENABLE 0x1A0\r
 %define MSR_EFER      0xc0000080\r
 %define MSR_EFER_XD   0x800\r
@@ -204,6 +206,7 @@ ASM_PFX(SmiHandler):
     wrmsr\r
 \r
 .7:\r
+    StuffRsb32\r
     rsm\r
 \r
 ASM_PFX(gcSmiHandlerSize): DW $ - _SmiEntryPoint\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index 5ff3cd2e731fb142fc2d1a5a5fdb13ef405c3e9c..322b1ab55687311230b124d747578a4173577082 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -18,6 +18,8 @@
 ;\r
 ;-------------------------------------------------------------------------------\r
 \r
+%include "StuffRsb.inc"\r
+\r
 extern ASM_PFX(SmmInitHandler)\r
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
@@ -75,6 +77,7 @@ BITS 32
     mov     esp, strict dword 0         ; source operand will be patched\r
 ASM_PFX(gPatchSmmInitStack):\r
     call    ASM_PFX(SmmInitHandler)\r
+    StuffRsb32\r
     rsm\r
 \r
 BITS 16\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
new file mode 100644 (file)
index 0000000..14267c3
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/StuffRsb.inc
@@ -0,0 +1,55 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Abstract:\r
+;\r
+;   This file provides macro definitions for stuffing the Return Stack Buffer (RSB).\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+%define RSB_STUFF_ENTRIES 0x20\r
+\r
+;\r
+; parameters:\r
+; @param 1: register to use as counter (e.g. IA32:eax, X64:rax)\r
+; @param 2: stack pointer to restore   (IA32:esp, X64:rsp)\r
+; @param 3: the size of a stack frame  (IA32:4, X64:8)\r
+;\r
+%macro StuffRsb 3\r
+      mov     %1, RSB_STUFF_ENTRIES / 2\r
+  %%Unroll1:\r
+      call    %%Unroll2\r
+  %%SpecTrap1:\r
+      pause\r
+      lfence\r
+      jmp     %%SpecTrap1\r
+  %%Unroll2:\r
+      call    %%StuffLoop\r
+  %%SpecTrap2:\r
+      pause\r
+      lfence\r
+      jmp     %%SpecTrap2\r
+  %%StuffLoop:\r
+      dec     %1\r
+      jnz     %%Unroll1\r
+      add     %2, RSB_STUFF_ENTRIES * %3 ; Restore the stack pointer\r
+%endmacro\r
+\r
+;\r
+; RSB stuffing macros for IA32 and X64\r
+;\r
+%macro StuffRsb32 0\r
+      StuffRsb     eax, esp, 4\r
+%endmacro\r
+\r
+%macro StuffRsb64 0\r
+      StuffRsb     rax, rsp, 8\r
+%endmacro\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index 97c7b01d0db704dd3e752960d606ad8a41a09c05..315d0f8670757f6cdb93e5a5d0ace0c03971cb10 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -18,6 +18,8 @@
 ;\r
 ;-------------------------------------------------------------------------------\r
 \r
+%include "StuffRsb.inc"\r
+\r
 ;\r
 ; Variables referrenced by C code\r
 ;\r
@@ -217,6 +219,7 @@ _SmiHandler:
     wrmsr\r
 \r
 .1:\r
+    StuffRsb64\r
     rsm\r
 \r
 ASM_PFX(gcSmiHandlerSize)    DW      $ - _SmiEntryPoint\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 0b0c3f28e53fa04c7733dee48ddd6704fdb10686..24357d5870869cff37aee174abfb244a0924d573 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -18,6 +18,8 @@
 ;\r
 ;-------------------------------------------------------------------------------\r
 \r
+%include "StuffRsb.inc"\r
+\r
 extern ASM_PFX(SmmInitHandler)\r
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
@@ -101,6 +103,7 @@ ASM_PFX(gPatchSmmInitStack):
     movdqa  xmm4, [rsp + 0x40]\r
     movdqa  xmm5, [rsp + 0x50]\r
 \r
+    StuffRsb64\r
     rsm\r
 \r
 BITS 16\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc
new file mode 100644 (file)
index 0000000..14267c3
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/StuffRsb.inc
@@ -0,0 +1,55 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Abstract:\r
+;\r
+;   This file provides macro definitions for stuffing the Return Stack Buffer (RSB).\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+%define RSB_STUFF_ENTRIES 0x20\r
+\r
+;\r
+; parameters:\r
+; @param 1: register to use as counter (e.g. IA32:eax, X64:rax)\r
+; @param 2: stack pointer to restore   (IA32:esp, X64:rsp)\r
+; @param 3: the size of a stack frame  (IA32:4, X64:8)\r
+;\r
+%macro StuffRsb 3\r
+      mov     %1, RSB_STUFF_ENTRIES / 2\r
+  %%Unroll1:\r
+      call    %%Unroll2\r
+  %%SpecTrap1:\r
+      pause\r
+      lfence\r
+      jmp     %%SpecTrap1\r
+  %%Unroll2:\r
+      call    %%StuffLoop\r
+  %%SpecTrap2:\r
+      pause\r
+      lfence\r
+      jmp     %%SpecTrap2\r
+  %%StuffLoop:\r
+      dec     %1\r
+      jnz     %%Unroll1\r
+      add     %2, RSB_STUFF_ENTRIES * %3 ; Restore the stack pointer\r
+%endmacro\r
+\r
+;\r
+; RSB stuffing macros for IA32 and X64\r
+;\r
+%macro StuffRsb32 0\r
+      StuffRsb     eax, esp, 4\r
+%endmacro\r
+\r
+%macro StuffRsb64 0\r
+      StuffRsb     rax, rsp, 8\r
+%endmacro\r