MdePkg/BaseLib: Add MemoryFence implementation for RiscV64

Cc: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 6ccb8997b7e8f93733c92dbe9007582fcc68f97c..6efa5315b653bb3c8e5101aebb5127db1cb4975e 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -4,7 +4,7 @@
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
-#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+#  Copyright (c) 2020 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -401,6 +401,7 @@
   RiscV64/DisableInterrupts.c\r
   RiscV64/EnableInterrupts.c\r
   RiscV64/CpuPause.c\r
+  RiscV64/MemoryFence.S             | GCC\r
   RiscV64/RiscVSetJumpLongJump.S    | GCC\r
   RiscV64/RiscVCpuBreakpoint.S      | GCC\r
   RiscV64/RiscVCpuPause.S           | GCC\r

diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
new file mode 100644 (file)
index 0000000..cc81683
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
@@ -0,0 +1,22 @@
+//------------------------------------------------------------------------------\r
+//\r
+// MemoryFence() for RiscV64\r
+//\r
+// Copyright (c) 2021, Hewlett Packard Enterprise Development. All rights reserved.\r
+//\r
+// SPDX-License-Identifier: BSD-2-Clause-Patent\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+\r
+ASM_GLOBAL ASM_PFX(MemoryFence)\r
+\r
+//\r
+// Memory fence for RiscV64\r
+//\r
+//\r
+ASM_PFX(MemoryFence):\r
+    fence  // Fence on all memory and I/O\r
+    ret\r