PcAtChipsetPkg/PciHostBridgeDxe: fix typo in "aperture"

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Olivier Martin <Olivier.martin@arm.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16891 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
index 83fcdf4f1a7742fab38b38b9467864d6c8f319c2..2f6ef68f1dcc742752ab6d89adea9f095d69c8fd 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
@@ -18,7 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 // Hard code: Root Bridge Number within the host bridge\r
 //            Root Bridge's attribute\r
 //            Root Bridge's device path\r
-//            Root Bridge's resource appeture\r
+//            Root Bridge's resource aperture\r
 //\r
 UINTN RootBridgeNumber[1] = { 1 };\r
 \r
@@ -52,7 +52,7 @@ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
   }\r
 };\r
 \r
-PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = {\r
+PCI_ROOT_BRIDGE_RESOURCE_APERTURE  mResAperture[1][1] = {\r
   {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}\r
 };\r
 \r
@@ -145,7 +145,7 @@ InitializePciHostBridge (
         &PrivateData->Io, \r
         HostBridge->HostBridgeHandle, \r
         RootBridgeAttribute[Loop1][Loop2], \r
-        &mResAppeture[Loop1][Loop2]\r
+        &mResAperture[Loop1][Loop2]\r
         );\r
     \r
       Status = gBS->InstallMultipleProtocolInterfaces(\r

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
index f81982985a08ad91c6ac0a79caa7a7b7bee3f199..52ff53240975403f82050d279f26672c6784965b 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
@@ -403,7 +403,7 @@ typedef struct {
   \r
   UINT64          IoBase; \r
   UINT64          IoLimit;     \r
-} PCI_ROOT_BRIDGE_RESOURCE_APPETURE;\r
+} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;\r
 \r
 typedef enum {\r
   TypeIo = 0,\r
@@ -482,7 +482,7 @@ typedef struct {
   @param Protocol         Point to protocol instance\r
   @param HostBridgeHandle Handle of host bridge\r
   @param Attri            Attribute of host bridge\r
-  @param ResAppeture      ResourceAppeture for host bridge\r
+  @param ResAperture      ResourceAperture for host bridge\r
 \r
   @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.\r
 \r
@@ -492,7 +492,7 @@ RootBridgeConstructor (
   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,\r
   IN EFI_HANDLE                         HostBridgeHandle,\r
   IN UINT64                             Attri,\r
-  IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE  *ResAppeture\r
+  IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE  *ResAperture\r
   );\r
 \r
 #endif\r

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
index 7946324d9f674525c5e098c43288ac21adcca8be..c7d9f06fb02162372a9cb47e001ad0d4b9385c9c 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -621,7 +621,7 @@ UINT8 mOutStride[] = {
   @param Protocol         Point to protocol instance\r
   @param HostBridgeHandle Handle of host bridge\r
   @param Attri            Attribute of host bridge\r
-  @param ResAppeture      ResourceAppeture for host bridge\r
+  @param ResAperture      ResourceAperture for host bridge\r
 \r
   @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.\r
 \r
@@ -631,7 +631,7 @@ RootBridgeConstructor (
   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,\r
   IN EFI_HANDLE                         HostBridgeHandle,\r
   IN UINT64                             Attri,\r
-  IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE  *ResAppeture\r
+  IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE  *ResAperture\r
   )\r
 {\r
   EFI_STATUS                        Status;\r
@@ -644,21 +644,21 @@ RootBridgeConstructor (
   // The host to pci bridge, the host memory and io addresses are\r
   // direct mapped to pci addresses, so no need translate, set bases to 0.\r
   //\r
-  PrivateData->MemBase = ResAppeture->MemBase;\r
-  PrivateData->IoBase  = ResAppeture->IoBase;\r
+  PrivateData->MemBase = ResAperture->MemBase;\r
+  PrivateData->IoBase  = ResAperture->IoBase;\r
 \r
   //\r
   // The host bridge only supports 32bit addressing for memory\r
   // and standard IA32 16bit io\r
   //\r
-  PrivateData->MemLimit = ResAppeture->MemLimit;\r
-  PrivateData->IoLimit  = ResAppeture->IoLimit;\r
+  PrivateData->MemLimit = ResAperture->MemLimit;\r
+  PrivateData->IoLimit  = ResAperture->IoLimit;\r
 \r
   //\r
-  // Bus Appeture for this Root Bridge (Possible Range)\r
+  // Bus Aperture for this Root Bridge (Possible Range)\r
   //\r
-  PrivateData->BusBase  = ResAppeture->BusBase;\r
-  PrivateData->BusLimit = ResAppeture->BusLimit;\r
+  PrivateData->BusBase  = ResAperture->BusBase;\r
+  PrivateData->BusLimit = ResAperture->BusLimit;\r
   \r
   //\r
   // Specific for this chipset\r