MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL

Implementation of RISC-V DxeIPL.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Co-authored-by: Daniel Helmut <daniel.schaefer@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 98bc17fc9d1f6117c6963fb5dccebafe95b34482..3f17028546609378c1cf8066247b652fe34ec4fa 100644 (file)
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -7,6 +7,7 @@
 #\r
 #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -25,7 +26,7 @@
 #\r
 # The following information is for reference only and not required by the build tools.\r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only) AARCH64\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only) AARCH64 RISCV64\r
 #\r
 \r
 [Sources]\r
@@ -49,6 +50,9 @@
 [Sources.ARM, Sources.AARCH64]\r
   Arm/DxeLoadFunc.c\r
 \r
+[Sources.RISCV64]\r
+  RiscV64/DxeLoadFunc.c\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
   MdeModulePkg/MdeModulePkg.dec\r

diff --git a/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
new file mode 100644 (file)
index 0000000..2ce52eb
--- /dev/null
+++ b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c
@@ -0,0 +1,74 @@
+/** @file\r
+  RISC-V specific functionality for DxeLoad.\r
+\r
+  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include "DxeIpl.h"\r
+\r
+/**\r
+   Transfers control to DxeCore.\r
+\r
+   This function performs a CPU architecture specific operations to execute\r
+   the entry point of DxeCore with the parameters of HobList.\r
+   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
+\r
+   @param DxeCoreEntryPoint         The entry point of DxeCore.\r
+   @param HobList                   The start of HobList passed to DxeCore.\r
+\r
+**/\r
+VOID\r
+HandOffToDxeCore (\r
+  IN EFI_PHYSICAL_ADDRESS   DxeCoreEntryPoint,\r
+  IN EFI_PEI_HOB_POINTERS   HobList\r
+  )\r
+{\r
+  VOID                            *BaseOfStack;\r
+  VOID                            *TopOfStack;\r
+  EFI_STATUS                      Status;\r
+  //\r
+  //\r
+  // Allocate 128KB for the Stack\r
+  //\r
+  BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
+  if (BaseOfStack == NULL) {\r
+    DEBUG((DEBUG_ERROR, "%a: Can't allocate memory for stack.", __FUNCTION__));\r
+    ASSERT(FALSE);\r
+  }\r
+\r
+  //\r
+  // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
+  // for safety.\r
+  //\r
+  TopOfStack = (VOID *)((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
+  TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
+\r
+  //\r
+  // End of PEI phase signal\r
+  //\r
+  Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG((DEBUG_ERROR, "%a: Fail to signal End of PEI event.", __FUNCTION__));\r
+    ASSERT(FALSE);\r
+  }\r
+  //\r
+  // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
+  //\r
+  UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
+\r
+  DEBUG ((DEBUG_INFO, "DXE Core new stack at %x, stack pointer at %x\n", BaseOfStack, TopOfStack));\r
+\r
+  //\r
+  // Transfer the control to the entry point of DxeCore.\r
+  //\r
+  SwitchStack (\r
+    (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
+    HobList.Raw,\r
+    NULL,\r
+    TopOfStack\r
+    );\r
+}\r
+\r