\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PLATFORM_ID);\r
@endcode\r
+ @note MSR_NEHALEM_PLATFORM_ID is defined as MSR_PLATFORM_ID in SDM.\r
**/\r
#define MSR_NEHALEM_PLATFORM_ID 0x00000017\r
\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_SMI_COUNT);\r
@endcode\r
+ @note MSR_NEHALEM_SMI_COUNT is defined as MSR_SMI_COUNT in SDM.\r
**/\r
#define MSR_NEHALEM_SMI_COUNT 0x00000034\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PLATFORM_INFO);\r
AsmWriteMsr64 (MSR_NEHALEM_PLATFORM_INFO, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PLATFORM_INFO is defined as MSR_PLATFORM_INFO in SDM.\r
**/\r
#define MSR_NEHALEM_PLATFORM_INFO 0x000000CE\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PKG_CST_CONFIG_CONTROL);\r
AsmWriteMsr64 (MSR_NEHALEM_PKG_CST_CONFIG_CONTROL, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PKG_CST_CONFIG_CONTROL is defined as MSR_PKG_CST_CONFIG_CONTROL in SDM.\r
**/\r
#define MSR_NEHALEM_PKG_CST_CONFIG_CONTROL 0x000000E2\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PMG_IO_CAPTURE_BASE);\r
AsmWriteMsr64 (MSR_NEHALEM_PMG_IO_CAPTURE_BASE, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PMG_IO_CAPTURE_BASE is defined as MSR_PMG_IO_CAPTURE_BASE in SDM.\r
**/\r
#define MSR_NEHALEM_PMG_IO_CAPTURE_BASE 0x000000E4\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_IA32_MISC_ENABLE);\r
AsmWriteMsr64 (MSR_NEHALEM_IA32_MISC_ENABLE, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_IA32_MISC_ENABLE is defined as IA32_MISC_ENABLE in SDM.\r
**/\r
#define MSR_NEHALEM_IA32_MISC_ENABLE 0x000001A0\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TEMPERATURE_TARGET);\r
AsmWriteMsr64 (MSR_NEHALEM_TEMPERATURE_TARGET, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_TEMPERATURE_TARGET is defined as MSR_TEMPERATURE_TARGET in SDM.\r
**/\r
#define MSR_NEHALEM_TEMPERATURE_TARGET 0x000001A2\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_MISC_FEATURE_CONTROL);\r
AsmWriteMsr64 (MSR_NEHALEM_MISC_FEATURE_CONTROL, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_MISC_FEATURE_CONTROL is defined as MSR_MISC_FEATURE_CONTROL in SDM.\r
**/\r
#define MSR_NEHALEM_MISC_FEATURE_CONTROL 0x000001A4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_OFFCORE_RSP_0);\r
AsmWriteMsr64 (MSR_NEHALEM_OFFCORE_RSP_0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_OFFCORE_RSP_0 is defined as MSR_OFFCORE_RSP_0 in SDM.\r
**/\r
#define MSR_NEHALEM_OFFCORE_RSP_0 0x000001A6\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_MISC_PWR_MGMT);\r
AsmWriteMsr64 (MSR_NEHALEM_MISC_PWR_MGMT, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_MISC_PWR_MGMT is defined as MSR_MISC_PWR_MGMT in SDM.\r
**/\r
#define MSR_NEHALEM_MISC_PWR_MGMT 0x000001AA\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT);\r
AsmWriteMsr64 (MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT is defined as MSR_TURBO_POWER_CURRENT_LIMIT in SDM.\r
**/\r
#define MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT 0x000001AC\r
\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TURBO_RATIO_LIMIT);\r
@endcode\r
+ @note MSR_NEHALEM_TURBO_RATIO_LIMIT is defined as MSR_TURBO_RATIO_LIMIT in SDM.\r
**/\r
#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x000001AD\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_LBR_SELECT);\r
AsmWriteMsr64 (MSR_NEHALEM_LBR_SELECT, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_LBR_SELECT is defined as MSR_LBR_SELECT in SDM.\r
**/\r
#define MSR_NEHALEM_LBR_SELECT 0x000001C8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_TOS);\r
AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_TOS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_LASTBRANCH_TOS is defined as MSR_LASTBRANCH_TOS in SDM.\r
**/\r
#define MSR_NEHALEM_LASTBRANCH_TOS 0x000001C9\r
\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_LER_FROM_LIP);\r
@endcode\r
+ @note MSR_NEHALEM_LER_FROM_LIP is defined as MSR_LER_FROM_LIP in SDM.\r
**/\r
#define MSR_NEHALEM_LER_FROM_LIP 0x000001DD\r
\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_LER_TO_LIP);\r
@endcode\r
+ @note MSR_NEHALEM_LER_TO_LIP is defined as MSR_LER_TO_LIP in SDM.\r
**/\r
#define MSR_NEHALEM_LER_TO_LIP 0x000001DE\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_POWER_CTL);\r
AsmWriteMsr64 (MSR_NEHALEM_POWER_CTL, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_POWER_CTL is defined as MSR_POWER_CTL in SDM.\r
**/\r
#define MSR_NEHALEM_POWER_CTL 0x000001FC\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS);\r
AsmWriteMsr64 (MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS is defined as IA32_PERF_GLOBAL_STAUS in SDM.\r
**/\r
#define MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS 0x0000038E\r
\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PERF_GLOBAL_STAUS);\r
@endcode\r
+ @note MSR_NEHALEM_PERF_GLOBAL_STAUS is defined as MSR_PERF_GLOBAL_STAUS in SDM.\r
**/\r
#define MSR_NEHALEM_PERF_GLOBAL_STAUS 0x0000038E\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL is defined as MSR_PERF_GLOBAL_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL 0x00000390\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PEBS_ENABLE);\r
AsmWriteMsr64 (MSR_NEHALEM_PEBS_ENABLE, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PEBS_ENABLE is defined as MSR_PEBS_ENABLE in SDM.\r
**/\r
#define MSR_NEHALEM_PEBS_ENABLE 0x000003F1\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PEBS_LD_LAT);\r
AsmWriteMsr64 (MSR_NEHALEM_PEBS_LD_LAT, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_PEBS_LD_LAT is defined as MSR_PEBS_LD_LAT in SDM.\r
**/\r
#define MSR_NEHALEM_PEBS_LD_LAT 0x000003F6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C3_RESIDENCY);\r
AsmWriteMsr64 (MSR_NEHALEM_PKG_C3_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_PKG_C3_RESIDENCY is defined as MSR_PKG_C3_RESIDENCY in SDM.\r
**/\r
#define MSR_NEHALEM_PKG_C3_RESIDENCY 0x000003F8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C6_RESIDENCY);\r
AsmWriteMsr64 (MSR_NEHALEM_PKG_C6_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_PKG_C6_RESIDENCY is defined as MSR_PKG_C6_RESIDENCY in SDM.\r
**/\r
#define MSR_NEHALEM_PKG_C6_RESIDENCY 0x000003F9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C7_RESIDENCY);\r
AsmWriteMsr64 (MSR_NEHALEM_PKG_C7_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_PKG_C7_RESIDENCY is defined as MSR_PKG_C7_RESIDENCY in SDM.\r
**/\r
#define MSR_NEHALEM_PKG_C7_RESIDENCY 0x000003FA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_CORE_C3_RESIDENCY);\r
AsmWriteMsr64 (MSR_NEHALEM_CORE_C3_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_CORE_C3_RESIDENCY is defined as MSR_CORE_C3_RESIDENCY in SDM.\r
**/\r
#define MSR_NEHALEM_CORE_C3_RESIDENCY 0x000003FC\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_CORE_C6_RESIDENCY);\r
AsmWriteMsr64 (MSR_NEHALEM_CORE_C6_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_CORE_C6_RESIDENCY is defined as MSR_CORE_C6_RESIDENCY in SDM.\r
**/\r
#define MSR_NEHALEM_CORE_C6_RESIDENCY 0x000003FD\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_MC0_MISC);\r
AsmWriteMsr64 (MSR_NEHALEM_MC0_MISC, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_MC0_MISC is defined as MSR_MC0_MISC in SDM.\r
+ MSR_NEHALEM_MC1_MISC is defined as MSR_MC1_MISC in SDM.\r
+ MSR_NEHALEM_MC2_MISC is defined as MSR_MC2_MISC in SDM.\r
+ MSR_NEHALEM_MC3_MISC is defined as MSR_MC3_MISC in SDM.\r
+ MSR_NEHALEM_MC4_MISC is defined as MSR_MC4_MISC in SDM.\r
+ MSR_NEHALEM_MC5_MISC is defined as MSR_MC5_MISC in SDM.\r
+ MSR_NEHALEM_MC6_MISC is defined as MSR_MC6_MISC in SDM.\r
+ MSR_NEHALEM_MC7_MISC is defined as MSR_MC7_MISC in SDM.\r
+ MSR_NEHALEM_MC8_MISC is defined as MSR_MC8_MISC in SDM.\r
+ MSR_NEHALEM_MC9_MISC is defined as MSR_MC9_MISC in SDM.\r
+ MSR_NEHALEM_MC10_MISC is defined as MSR_MC10_MISC in SDM.\r
+ MSR_NEHALEM_MC11_MISC is defined as MSR_MC11_MISC in SDM.\r
+ MSR_NEHALEM_MC12_MISC is defined as MSR_MC12_MISC in SDM.\r
+ MSR_NEHALEM_MC13_MISC is defined as MSR_MC13_MISC in SDM.\r
+ MSR_NEHALEM_MC14_MISC is defined as MSR_MC14_MISC in SDM.\r
+ MSR_NEHALEM_MC15_MISC is defined as MSR_MC15_MISC in SDM.\r
+ MSR_NEHALEM_MC16_MISC is defined as MSR_MC16_MISC in SDM.\r
+ MSR_NEHALEM_MC17_MISC is defined as MSR_MC17_MISC in SDM.\r
+ MSR_NEHALEM_MC18_MISC is defined as MSR_MC18_MISC in SDM.\r
+ MSR_NEHALEM_MC19_MISC is defined as MSR_MC19_MISC in SDM.\r
+ MSR_NEHALEM_MC20_MISC is defined as MSR_MC20_MISC in SDM.\r
+ MSR_NEHALEM_MC21_MISC is defined as MSR_MC21_MISC in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_MC0_MISC 0x00000403\r
Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_CTL);\r
AsmWriteMsr64 (MSR_NEHALEM_MC3_CTL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_MC3_CTL is defined as MSR_MC3_CTL in SDM.\r
+ MSR_NEHALEM_MC4_CTL is defined as MSR_MC4_CTL in SDM.\r
+ MSR_NEHALEM_MC5_CTL is defined as MSR_MC5_CTL in SDM.\r
+ MSR_NEHALEM_MC6_CTL is defined as MSR_MC6_CTL in SDM.\r
+ MSR_NEHALEM_MC7_CTL is defined as MSR_MC7_CTL in SDM.\r
+ MSR_NEHALEM_MC8_CTL is defined as MSR_MC8_CTL in SDM.\r
+ MSR_NEHALEM_MC9_CTL is defined as MSR_MC9_CTL in SDM.\r
+ MSR_NEHALEM_MC10_CTL is defined as MSR_MC10_CTL in SDM.\r
+ MSR_NEHALEM_MC11_CTL is defined as MSR_MC11_CTL in SDM.\r
+ MSR_NEHALEM_MC12_CTL is defined as MSR_MC12_CTL in SDM.\r
+ MSR_NEHALEM_MC13_CTL is defined as MSR_MC13_CTL in SDM.\r
+ MSR_NEHALEM_MC14_CTL is defined as MSR_MC14_CTL in SDM.\r
+ MSR_NEHALEM_MC15_CTL is defined as MSR_MC15_CTL in SDM.\r
+ MSR_NEHALEM_MC16_CTL is defined as MSR_MC16_CTL in SDM.\r
+ MSR_NEHALEM_MC17_CTL is defined as MSR_MC17_CTL in SDM.\r
+ MSR_NEHALEM_MC18_CTL is defined as MSR_MC18_CTL in SDM.\r
+ MSR_NEHALEM_MC19_CTL is defined as MSR_MC19_CTL in SDM.\r
+ MSR_NEHALEM_MC20_CTL is defined as MSR_MC20_CTL in SDM.\r
+ MSR_NEHALEM_MC21_CTL is defined as MSR_MC21_CTL in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_MC3_CTL 0x0000040C\r
Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_MC3_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_MC3_STATUS is defined as MSR_MC3_STATUS in SDM.\r
+ MSR_NEHALEM_MC4_STATUS is defined as MSR_MC4_STATUS in SDM.\r
+ MSR_NEHALEM_MC5_STATUS is defined as MSR_MC5_STATUS in SDM.\r
+ MSR_NEHALEM_MC6_STATUS is defined as MSR_MC6_STATUS in SDM.\r
+ MSR_NEHALEM_MC7_STATUS is defined as MSR_MC7_STATUS in SDM.\r
+ MSR_NEHALEM_MC8_STATUS is defined as MSR_MC8_STATUS in SDM.\r
+ MSR_NEHALEM_MC9_STATUS is defined as MSR_MC9_STATUS in SDM.\r
+ MSR_NEHALEM_MC10_STATUS is defined as MSR_MC10_STATUS in SDM.\r
+ MSR_NEHALEM_MC11_STATUS is defined as MSR_MC11_STATUS in SDM.\r
+ MSR_NEHALEM_MC12_STATUS is defined as MSR_MC12_STATUS in SDM.\r
+ MSR_NEHALEM_MC13_STATUS is defined as MSR_MC13_STATUS in SDM.\r
+ MSR_NEHALEM_MC14_STATUS is defined as MSR_MC14_STATUS in SDM.\r
+ MSR_NEHALEM_MC15_STATUS is defined as MSR_MC15_STATUS in SDM.\r
+ MSR_NEHALEM_MC16_STATUS is defined as MSR_MC16_STATUS in SDM.\r
+ MSR_NEHALEM_MC17_STATUS is defined as MSR_MC17_STATUS in SDM.\r
+ MSR_NEHALEM_MC18_STATUS is defined as MSR_MC18_STATUS in SDM.\r
+ MSR_NEHALEM_MC19_STATUS is defined as MSR_MC19_STATUS in SDM.\r
+ MSR_NEHALEM_MC20_STATUS is defined as MSR_MC20_STATUS in SDM.\r
+ MSR_NEHALEM_MC21_STATUS is defined as MSR_MC21_STATUS in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_MC3_STATUS 0x0000040D\r
Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_ADDR);\r
AsmWriteMsr64 (MSR_NEHALEM_MC3_ADDR, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_MC3_ADDR is defined as MSR_MC3_ADDR in SDM.\r
+ MSR_NEHALEM_MC4_ADDR is defined as MSR_MC4_ADDR in SDM.\r
+ MSR_NEHALEM_MC5_ADDR is defined as MSR_MC5_ADDR in SDM.\r
+ MSR_NEHALEM_MC6_ADDR is defined as MSR_MC6_ADDR in SDM.\r
+ MSR_NEHALEM_MC7_ADDR is defined as MSR_MC7_ADDR in SDM.\r
+ MSR_NEHALEM_MC8_ADDR is defined as MSR_MC8_ADDR in SDM.\r
+ MSR_NEHALEM_MC9_ADDR is defined as MSR_MC9_ADDR in SDM.\r
+ MSR_NEHALEM_MC10_ADDR is defined as MSR_MC10_ADDR in SDM.\r
+ MSR_NEHALEM_MC11_ADDR is defined as MSR_MC11_ADDR in SDM.\r
+ MSR_NEHALEM_MC12_ADDR is defined as MSR_MC12_ADDR in SDM.\r
+ MSR_NEHALEM_MC13_ADDR is defined as MSR_MC13_ADDR in SDM.\r
+ MSR_NEHALEM_MC14_ADDR is defined as MSR_MC14_ADDR in SDM.\r
+ MSR_NEHALEM_MC15_ADDR is defined as MSR_MC15_ADDR in SDM.\r
+ MSR_NEHALEM_MC16_ADDR is defined as MSR_MC16_ADDR in SDM.\r
+ MSR_NEHALEM_MC17_ADDR is defined as MSR_MC17_ADDR in SDM.\r
+ MSR_NEHALEM_MC18_ADDR is defined as MSR_MC18_ADDR in SDM.\r
+ MSR_NEHALEM_MC19_ADDR is defined as MSR_MC19_ADDR in SDM.\r
+ MSR_NEHALEM_MC20_ADDR is defined as MSR_MC20_ADDR in SDM.\r
+ MSR_NEHALEM_MC21_ADDR is defined as MSR_MC21_ADDR in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_MC3_ADDR 0x0000040E\r
Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_0_FROM_IP);\r
AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_0_FROM_IP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_LASTBRANCH_0_FROM_IP is defined as MSR_LASTBRANCH_0_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_1_FROM_IP is defined as MSR_LASTBRANCH_1_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_2_FROM_IP is defined as MSR_LASTBRANCH_2_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_3_FROM_IP is defined as MSR_LASTBRANCH_3_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_4_FROM_IP is defined as MSR_LASTBRANCH_4_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_5_FROM_IP is defined as MSR_LASTBRANCH_5_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_6_FROM_IP is defined as MSR_LASTBRANCH_6_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_7_FROM_IP is defined as MSR_LASTBRANCH_7_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_8_FROM_IP is defined as MSR_LASTBRANCH_8_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_9_FROM_IP is defined as MSR_LASTBRANCH_9_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_10_FROM_IP is defined as MSR_LASTBRANCH_10_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_11_FROM_IP is defined as MSR_LASTBRANCH_11_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_12_FROM_IP is defined as MSR_LASTBRANCH_12_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_13_FROM_IP is defined as MSR_LASTBRANCH_13_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_14_FROM_IP is defined as MSR_LASTBRANCH_14_FROM_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_15_FROM_IP is defined as MSR_LASTBRANCH_15_FROM_IP in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_LASTBRANCH_0_FROM_IP 0x00000680\r
Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_0_TO_IP);\r
AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_0_TO_IP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_LASTBRANCH_0_TO_IP is defined as MSR_LASTBRANCH_0_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_1_TO_IP is defined as MSR_LASTBRANCH_1_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_2_TO_IP is defined as MSR_LASTBRANCH_2_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_3_TO_IP is defined as MSR_LASTBRANCH_3_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_4_TO_IP is defined as MSR_LASTBRANCH_4_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_5_TO_IP is defined as MSR_LASTBRANCH_5_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_6_TO_IP is defined as MSR_LASTBRANCH_6_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_7_TO_IP is defined as MSR_LASTBRANCH_7_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_8_TO_IP is defined as MSR_LASTBRANCH_8_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_9_TO_IP is defined as MSR_LASTBRANCH_9_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_10_TO_IP is defined as MSR_LASTBRANCH_10_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_11_TO_IP is defined as MSR_LASTBRANCH_11_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_12_TO_IP is defined as MSR_LASTBRANCH_12_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_13_TO_IP is defined as MSR_LASTBRANCH_13_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_14_TO_IP is defined as MSR_LASTBRANCH_14_TO_IP in SDM.\r
+ MSR_NEHALEM_LASTBRANCH_15_TO_IP is defined as MSR_LASTBRANCH_15_TO_IP in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_LASTBRANCH_0_TO_IP 0x000006C0\r
Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_GQ_SNOOP_MESF);\r
AsmWriteMsr64 (MSR_NEHALEM_GQ_SNOOP_MESF, Msr.Uint64);\r
@endcode\r
+ @note MSR_NEHALEM_GQ_SNOOP_MESF is defined as MSR_GQ_SNOOP_MESF in SDM.\r
**/\r
#define MSR_NEHALEM_GQ_SNOOP_MESF 0x00000301\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL is defined as MSR_UNCORE_PERF_GLOBAL_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL 0x00000391\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS is defined as MSR_UNCORE_PERF_GLOBAL_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS 0x00000392\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL is defined as MSR_UNCORE_PERF_GLOBAL_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL 0x00000393\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_FIXED_CTR0 is defined as MSR_UNCORE_FIXED_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_FIXED_CTR0 0x00000394\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL is defined as MSR_UNCORE_FIXED_CTR_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL 0x00000395\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH is defined as MSR_UNCORE_ADDR_OPCODE_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH 0x00000396\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PMC0);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PMC0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_PMC0 is defined as MSR_UNCORE_PMC0 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC1 is defined as MSR_UNCORE_PMC1 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC2 is defined as MSR_UNCORE_PMC2 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC3 is defined as MSR_UNCORE_PMC3 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC4 is defined as MSR_UNCORE_PMC4 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC5 is defined as MSR_UNCORE_PMC5 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC6 is defined as MSR_UNCORE_PMC6 in SDM.\r
+ MSR_NEHALEM_UNCORE_PMC7 is defined as MSR_UNCORE_PMC7 in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_UNCORE_PMC0 0x000003B0\r
Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERFEVTSEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERFEVTSEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_UNCORE_PERFEVTSEL0 is defined as MSR_UNCORE_PERFEVTSEL0 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL1 is defined as MSR_UNCORE_PERFEVTSEL1 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL2 is defined as MSR_UNCORE_PERFEVTSEL2 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL3 is defined as MSR_UNCORE_PERFEVTSEL3 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL4 is defined as MSR_UNCORE_PERFEVTSEL4 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL5 is defined as MSR_UNCORE_PERFEVTSEL5 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL6 is defined as MSR_UNCORE_PERFEVTSEL6 in SDM.\r
+ MSR_NEHALEM_UNCORE_PERFEVTSEL7 is defined as MSR_UNCORE_PERFEVTSEL7 in SDM.\r
@{\r
**/\r
#define MSR_NEHALEM_UNCORE_PERFEVTSEL0 0x000003C0\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_FIXED_CTR is defined as MSR_W_PMON_FIXED_CTR in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_FIXED_CTR 0x00000394\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR_CTL);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR_CTL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_FIXED_CTR_CTL is defined as MSR_W_PMON_FIXED_CTR_CTL in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_FIXED_CTR_CTL 0x00000395\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_U_PMON_GLOBAL_CTRL is defined as MSR_U_PMON_GLOBAL_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_U_PMON_GLOBAL_CTRL 0x00000C00\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_U_PMON_GLOBAL_STATUS is defined as MSR_U_PMON_GLOBAL_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_U_PMON_GLOBAL_STATUS 0x00000C01\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL is defined as MSR_U_PMON_GLOBAL_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL 0x00000C02\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_EVNT_SEL);\r
AsmWriteMsr64 (MSR_NEHALEM_U_PMON_EVNT_SEL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_U_PMON_EVNT_SEL is defined as MSR_U_PMON_EVNT_SEL in SDM.\r
**/\r
#define MSR_NEHALEM_U_PMON_EVNT_SEL 0x00000C10\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_CTR);\r
AsmWriteMsr64 (MSR_NEHALEM_U_PMON_CTR, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_U_PMON_CTR is defined as MSR_U_PMON_CTR in SDM.\r
**/\r
#define MSR_NEHALEM_U_PMON_CTR 0x00000C11\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_BOX_CTRL is defined as MSR_B0_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_BOX_CTRL 0x00000C20\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_BOX_STATUS is defined as MSR_B0_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_BOX_STATUS 0x00000C21\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL is defined as MSR_B0_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL 0x00000C22\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_EVNT_SEL0 is defined as MSR_B0_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_EVNT_SEL0 0x00000C30\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_CTR0 is defined as MSR_B0_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_CTR0 0x00000C31\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_EVNT_SEL1 is defined as MSR_B0_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_EVNT_SEL1 0x00000C32\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_CTR1 is defined as MSR_B0_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_CTR1 0x00000C33\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_EVNT_SEL2 is defined as MSR_B0_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_EVNT_SEL2 0x00000C34\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_CTR2 is defined as MSR_B0_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_CTR2 0x00000C35\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_EVNT_SEL3 is defined as MSR_B0_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_EVNT_SEL3 0x00000C36\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_CTR3 is defined as MSR_B0_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_CTR3 0x00000C37\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_BOX_CTRL is defined as MSR_S0_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_BOX_CTRL 0x00000C40\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_BOX_STATUS is defined as MSR_S0_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_BOX_STATUS 0x00000C41\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL is defined as MSR_S0_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL 0x00000C42\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_EVNT_SEL0 is defined as MSR_S0_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_EVNT_SEL0 0x00000C50\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_CTR0 is defined as MSR_S0_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_CTR0 0x00000C51\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_EVNT_SEL1 is defined as MSR_S0_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_EVNT_SEL1 0x00000C52\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_CTR1 is defined as MSR_S0_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_CTR1 0x00000C53\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_EVNT_SEL2 is defined as MSR_S0_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_EVNT_SEL2 0x00000C54\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_CTR2 is defined as MSR_S0_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_CTR2 0x00000C55\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_EVNT_SEL3 is defined as MSR_S0_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_EVNT_SEL3 0x00000C56\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_CTR3 is defined as MSR_S0_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_CTR3 0x00000C57\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_BOX_CTRL is defined as MSR_B1_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_BOX_CTRL 0x00000C60\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_BOX_STATUS is defined as MSR_B1_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_BOX_STATUS 0x00000C61\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL is defined as MSR_B1_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL 0x00000C62\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_EVNT_SEL0 is defined as MSR_B1_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_EVNT_SEL0 0x00000C70\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_CTR0 is defined as MSR_B1_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_CTR0 0x00000C71\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_EVNT_SEL1 is defined as MSR_B1_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_EVNT_SEL1 0x00000C72\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_CTR1 is defined as MSR_B1_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_CTR1 0x00000C73\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_EVNT_SEL2 is defined as MSR_B1_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_EVNT_SEL2 0x00000C74\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_CTR2 is defined as MSR_B1_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_CTR2 0x00000C75\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_EVNT_SEL3 is defined as MSR_B1_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_EVNT_SEL3 0x00000C76\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_CTR3 is defined as MSR_B1_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_CTR3 0x00000C77\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_BOX_CTRL is defined as MSR_W_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_BOX_CTRL 0x00000C80\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_BOX_STATUS is defined as MSR_W_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_BOX_STATUS 0x00000C81\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_BOX_OVF_CTRL is defined as MSR_W_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_BOX_OVF_CTRL 0x00000C82\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_EVNT_SEL0 is defined as MSR_W_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_EVNT_SEL0 0x00000C90\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_CTR0 is defined as MSR_W_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_CTR0 0x00000C91\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_EVNT_SEL1 is defined as MSR_W_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_EVNT_SEL1 0x00000C92\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_CTR1 is defined as MSR_W_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_CTR1 0x00000C93\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_EVNT_SEL2 is defined as MSR_W_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_EVNT_SEL2 0x00000C94\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_CTR2 is defined as MSR_W_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_CTR2 0x00000C95\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_EVNT_SEL3 is defined as MSR_W_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_EVNT_SEL3 0x00000C96\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_W_PMON_CTR3 is defined as MSR_W_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_W_PMON_CTR3 0x00000C97\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_BOX_CTRL is defined as MSR_M0_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_BOX_CTRL 0x00000CA0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_BOX_STATUS is defined as MSR_M0_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_BOX_STATUS 0x00000CA1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL is defined as MSR_M0_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL 0x00000CA2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_TIMESTAMP);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_TIMESTAMP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_TIMESTAMP is defined as MSR_M0_PMON_TIMESTAMP in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_TIMESTAMP 0x00000CA4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_DSP);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_DSP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_DSP is defined as MSR_M0_PMON_DSP in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_DSP 0x00000CA5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ISS);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ISS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_ISS is defined as MSR_M0_PMON_ISS in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_ISS 0x00000CA6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MAP);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MAP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_MAP is defined as MSR_M0_PMON_MAP in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_MAP 0x00000CA7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MSC_THR);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MSC_THR, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_MSC_THR is defined as MSR_M0_PMON_MSC_THR in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_MSC_THR 0x00000CA8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_PGT);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_PGT, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_PGT is defined as MSR_M0_PMON_PGT in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_PGT 0x00000CA9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_PLD);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_PLD, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_PLD is defined as MSR_M0_PMON_PLD in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_PLD 0x00000CAA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ZDP);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ZDP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_ZDP is defined as MSR_M0_PMON_ZDP in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_ZDP 0x00000CAB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL0 is defined as MSR_M0_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL0 0x00000CB0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR0 is defined as MSR_M0_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR0 0x00000CB1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL1 is defined as MSR_M0_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL1 0x00000CB2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR1 is defined as MSR_M0_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR1 0x00000CB3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL2 is defined as MSR_M0_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL2 0x00000CB4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR2 is defined as MSR_M0_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR2 0x00000CB5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL3 is defined as MSR_M0_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL3 0x00000CB6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR3 is defined as MSR_M0_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR3 0x00000CB7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL4 is defined as MSR_M0_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL4 0x00000CB8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR4 is defined as MSR_M0_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR4 0x00000CB9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_EVNT_SEL5 is defined as MSR_M0_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_EVNT_SEL5 0x00000CBA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_CTR5 is defined as MSR_M0_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_CTR5 0x00000CBB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_BOX_CTRL is defined as MSR_S1_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_BOX_CTRL 0x00000CC0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_BOX_STATUS is defined as MSR_S1_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_BOX_STATUS 0x00000CC1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL is defined as MSR_S1_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL 0x00000CC2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_EVNT_SEL0 is defined as MSR_S1_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_EVNT_SEL0 0x00000CD0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_CTR0 is defined as MSR_S1_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_CTR0 0x00000CD1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_EVNT_SEL1 is defined as MSR_S1_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_EVNT_SEL1 0x00000CD2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_CTR1 is defined as MSR_S1_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_CTR1 0x00000CD3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_EVNT_SEL2 is defined as MSR_S1_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_EVNT_SEL2 0x00000CD4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_CTR2 is defined as MSR_S1_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_CTR2 0x00000CD5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_EVNT_SEL3 is defined as MSR_S1_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_EVNT_SEL3 0x00000CD6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_CTR3 is defined as MSR_S1_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_CTR3 0x00000CD7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_BOX_CTRL is defined as MSR_M1_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_BOX_CTRL 0x00000CE0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_BOX_STATUS is defined as MSR_M1_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_BOX_STATUS 0x00000CE1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL is defined as MSR_M1_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL 0x00000CE2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_TIMESTAMP);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_TIMESTAMP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_TIMESTAMP is defined as MSR_M1_PMON_TIMESTAMP in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_TIMESTAMP 0x00000CE4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_DSP);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_DSP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_DSP is defined as MSR_M1_PMON_DSP in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_DSP 0x00000CE5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ISS);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ISS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_ISS is defined as MSR_M1_PMON_ISS in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_ISS 0x00000CE6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MAP);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MAP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_MAP is defined as MSR_M1_PMON_MAP in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_MAP 0x00000CE7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MSC_THR);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MSC_THR, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_MSC_THR is defined as MSR_M1_PMON_MSC_THR in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_MSC_THR 0x00000CE8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_PGT);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_PGT, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_PGT is defined as MSR_M1_PMON_PGT in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_PGT 0x00000CE9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_PLD);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_PLD, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_PLD is defined as MSR_M1_PMON_PLD in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_PLD 0x00000CEA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ZDP);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ZDP, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_ZDP is defined as MSR_M1_PMON_ZDP in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_ZDP 0x00000CEB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL0 is defined as MSR_M1_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL0 0x00000CF0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR0 is defined as MSR_M1_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR0 0x00000CF1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL1 is defined as MSR_M1_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL1 0x00000CF2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR1 is defined as MSR_M1_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR1 0x00000CF3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL2 is defined as MSR_M1_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL2 0x00000CF4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR2 is defined as MSR_M1_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR2 0x00000CF5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL3 is defined as MSR_M1_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL3 0x00000CF6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR3 is defined as MSR_M1_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR3 0x00000CF7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL4 is defined as MSR_M1_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL4 0x00000CF8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR4 is defined as MSR_M1_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR4 0x00000CF9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_EVNT_SEL5 is defined as MSR_M1_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_EVNT_SEL5 0x00000CFA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_CTR5 is defined as MSR_M1_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_CTR5 0x00000CFB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_BOX_CTRL is defined as MSR_C0_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_BOX_CTRL 0x00000D00\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_BOX_STATUS is defined as MSR_C0_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_BOX_STATUS 0x00000D01\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL is defined as MSR_C0_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL 0x00000D02\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL0 is defined as MSR_C0_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL0 0x00000D10\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR0 is defined as MSR_C0_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR0 0x00000D11\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL1 is defined as MSR_C0_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL1 0x00000D12\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR1 is defined as MSR_C0_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR1 0x00000D13\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL2 is defined as MSR_C0_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL2 0x00000D14\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR2 is defined as MSR_C0_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR2 0x00000D15\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL3 is defined as MSR_C0_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL3 0x00000D16\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR3 is defined as MSR_C0_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR3 0x00000D17\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL4 is defined as MSR_C0_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL4 0x00000D18\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR4 is defined as MSR_C0_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR4 0x00000D19\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_EVNT_SEL5 is defined as MSR_C0_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_EVNT_SEL5 0x00000D1A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C0_PMON_CTR5 is defined as MSR_C0_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C0_PMON_CTR5 0x00000D1B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_BOX_CTRL is defined as MSR_C4_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_BOX_CTRL 0x00000D20\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_BOX_STATUS is defined as MSR_C4_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_BOX_STATUS 0x00000D21\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL is defined as MSR_C4_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL 0x00000D22\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL0 is defined as MSR_C4_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL0 0x00000D30\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR0 is defined as MSR_C4_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR0 0x00000D31\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL1 is defined as MSR_C4_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL1 0x00000D32\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR1 is defined as MSR_C4_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR1 0x00000D33\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL2 is defined as MSR_C4_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL2 0x00000D34\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR2 is defined as MSR_C4_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR2 0x00000D35\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL3 is defined as MSR_C4_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL3 0x00000D36\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR3 is defined as MSR_C4_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR3 0x00000D37\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL4 is defined as MSR_C4_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL4 0x00000D38\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR4 is defined as MSR_C4_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR4 0x00000D39\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_EVNT_SEL5 is defined as MSR_C4_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_EVNT_SEL5 0x00000D3A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C4_PMON_CTR5 is defined as MSR_C4_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C4_PMON_CTR5 0x00000D3B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_BOX_CTRL is defined as MSR_C2_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_BOX_CTRL 0x00000D40\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_BOX_STATUS is defined as MSR_C2_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_BOX_STATUS 0x00000D41\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL is defined as MSR_C2_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL 0x00000D42\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL0 is defined as MSR_C2_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL0 0x00000D50\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR0 is defined as MSR_C2_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR0 0x00000D51\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL1 is defined as MSR_C2_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL1 0x00000D52\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR1 is defined as MSR_C2_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR1 0x00000D53\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL2 is defined as MSR_C2_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL2 0x00000D54\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR2 is defined as MSR_C2_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR2 0x00000D55\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL3 is defined as MSR_C2_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL3 0x00000D56\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR3 is defined as MSR_C2_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR3 0x00000D57\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL4 is defined as MSR_C2_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL4 0x00000D58\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR4 is defined as MSR_C2_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR4 0x00000D59\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_EVNT_SEL5 is defined as MSR_C2_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_EVNT_SEL5 0x00000D5A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C2_PMON_CTR5 is defined as MSR_C2_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C2_PMON_CTR5 0x00000D5B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_BOX_CTRL is defined as MSR_C6_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_BOX_CTRL 0x00000D60\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_BOX_STATUS is defined as MSR_C6_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_BOX_STATUS 0x00000D61\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL is defined as MSR_C6_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL 0x00000D62\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL0 is defined as MSR_C6_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL0 0x00000D70\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR0 is defined as MSR_C6_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR0 0x00000D71\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL1 is defined as MSR_C6_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL1 0x00000D72\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR1 is defined as MSR_C6_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR1 0x00000D73\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL2 is defined as MSR_C6_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL2 0x00000D74\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR2 is defined as MSR_C6_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR2 0x00000D75\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL3 is defined as MSR_C6_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL3 0x00000D76\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR3 is defined as MSR_C6_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR3 0x00000D77\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL4 is defined as MSR_C6_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL4 0x00000D78\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR4 is defined as MSR_C6_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR4 0x00000D79\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_EVNT_SEL5 is defined as MSR_C6_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_EVNT_SEL5 0x00000D7A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C6_PMON_CTR5 is defined as MSR_C6_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C6_PMON_CTR5 0x00000D7B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_BOX_CTRL is defined as MSR_C1_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_BOX_CTRL 0x00000D80\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_BOX_STATUS is defined as MSR_C1_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_BOX_STATUS 0x00000D81\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL is defined as MSR_C1_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL 0x00000D82\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL0 is defined as MSR_C1_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL0 0x00000D90\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR0 is defined as MSR_C1_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR0 0x00000D91\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL1 is defined as MSR_C1_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL1 0x00000D92\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR1 is defined as MSR_C1_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR1 0x00000D93\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL2 is defined as MSR_C1_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL2 0x00000D94\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR2 is defined as MSR_C1_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR2 0x00000D95\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL3 is defined as MSR_C1_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL3 0x00000D96\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR3 is defined as MSR_C1_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR3 0x00000D97\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL4 is defined as MSR_C1_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL4 0x00000D98\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR4 is defined as MSR_C1_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR4 0x00000D99\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_EVNT_SEL5 is defined as MSR_C1_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_EVNT_SEL5 0x00000D9A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C1_PMON_CTR5 is defined as MSR_C1_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C1_PMON_CTR5 0x00000D9B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_BOX_CTRL is defined as MSR_C5_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_BOX_CTRL 0x00000DA0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_BOX_STATUS is defined as MSR_C5_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_BOX_STATUS 0x00000DA1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL is defined as MSR_C5_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL 0x00000DA2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL0 is defined as MSR_C5_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL0 0x00000DB0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR0 is defined as MSR_C5_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR0 0x00000DB1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL1 is defined as MSR_C5_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL1 0x00000DB2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR1 is defined as MSR_C5_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR1 0x00000DB3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL2 is defined as MSR_C5_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL2 0x00000DB4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR2 is defined as MSR_C5_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR2 0x00000DB5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL3 is defined as MSR_C5_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL3 0x00000DB6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR3 is defined as MSR_C5_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR3 0x00000DB7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL4 is defined as MSR_C5_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL4 0x00000DB8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR4 is defined as MSR_C5_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR4 0x00000DB9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_EVNT_SEL5 is defined as MSR_C5_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_EVNT_SEL5 0x00000DBA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C5_PMON_CTR5 is defined as MSR_C5_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C5_PMON_CTR5 0x00000DBB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_BOX_CTRL is defined as MSR_C3_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_BOX_CTRL 0x00000DC0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_BOX_STATUS is defined as MSR_C3_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_BOX_STATUS 0x00000DC1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL is defined as MSR_C3_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL 0x00000DC2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL0 is defined as MSR_C3_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL0 0x00000DD0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR0 is defined as MSR_C3_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR0 0x00000DD1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL1 is defined as MSR_C3_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL1 0x00000DD2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR1 is defined as MSR_C3_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR1 0x00000DD3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL2 is defined as MSR_C3_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL2 0x00000DD4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR2 is defined as MSR_C3_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR2 0x00000DD5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL3 is defined as MSR_C3_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL3 0x00000DD6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR3 is defined as MSR_C3_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR3 0x00000DD7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL4 is defined as MSR_C3_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL4 0x00000DD8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR4 is defined as MSR_C3_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR4 0x00000DD9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_EVNT_SEL5 is defined as MSR_C3_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_EVNT_SEL5 0x00000DDA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C3_PMON_CTR5 is defined as MSR_C3_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C3_PMON_CTR5 0x00000DDB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_BOX_CTRL is defined as MSR_C7_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_BOX_CTRL 0x00000DE0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_BOX_STATUS is defined as MSR_C7_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_BOX_STATUS 0x00000DE1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL is defined as MSR_C7_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL 0x00000DE2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL0 is defined as MSR_C7_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL0 0x00000DF0\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR0 is defined as MSR_C7_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR0 0x00000DF1\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL1 is defined as MSR_C7_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL1 0x00000DF2\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR1 is defined as MSR_C7_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR1 0x00000DF3\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL2 is defined as MSR_C7_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL2 0x00000DF4\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR2 is defined as MSR_C7_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR2 0x00000DF5\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL3 is defined as MSR_C7_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL3 0x00000DF6\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR3 is defined as MSR_C7_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR3 0x00000DF7\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL4 is defined as MSR_C7_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL4 0x00000DF8\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR4 is defined as MSR_C7_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR4 0x00000DF9\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_EVNT_SEL5 is defined as MSR_C7_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_EVNT_SEL5 0x00000DFA\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_C7_PMON_CTR5 is defined as MSR_C7_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_C7_PMON_CTR5 0x00000DFB\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_BOX_CTRL is defined as MSR_R0_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_BOX_CTRL 0x00000E00\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_BOX_STATUS is defined as MSR_R0_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_BOX_STATUS 0x00000E01\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL is defined as MSR_R0_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL 0x00000E02\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P0);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P0 is defined as MSR_R0_PMON_IPERF0_P0 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P0 0x00000E04\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P1);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P1 is defined as MSR_R0_PMON_IPERF0_P1 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P1 0x00000E05\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P2);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P2 is defined as MSR_R0_PMON_IPERF0_P2 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P2 0x00000E06\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P3);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P3 is defined as MSR_R0_PMON_IPERF0_P3 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P3 0x00000E07\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P4);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P4 is defined as MSR_R0_PMON_IPERF0_P4 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P4 0x00000E08\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P5);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P5 is defined as MSR_R0_PMON_IPERF0_P5 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P5 0x00000E09\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P6);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P6, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P6 is defined as MSR_R0_PMON_IPERF0_P6 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P6 0x00000E0A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P7);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P7, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_IPERF0_P7 is defined as MSR_R0_PMON_IPERF0_P7 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_IPERF0_P7 0x00000E0B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P0);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_QLX_P0 is defined as MSR_R0_PMON_QLX_P0 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_QLX_P0 0x00000E0C\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P1);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_QLX_P1 is defined as MSR_R0_PMON_QLX_P1 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_QLX_P1 0x00000E0D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P2);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_QLX_P2 is defined as MSR_R0_PMON_QLX_P2 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_QLX_P2 0x00000E0E\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P3);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_QLX_P3 is defined as MSR_R0_PMON_QLX_P3 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_QLX_P3 0x00000E0F\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL0);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL0 is defined as MSR_R0_PMON_EVNT_SEL0 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL0 0x00000E10\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR0);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR0, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR0 is defined as MSR_R0_PMON_CTR0 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR0 0x00000E11\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL1);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL1 is defined as MSR_R0_PMON_EVNT_SEL1 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL1 0x00000E12\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR1);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR1, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR1 is defined as MSR_R0_PMON_CTR1 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR1 0x00000E13\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL2);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL2 is defined as MSR_R0_PMON_EVNT_SEL2 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL2 0x00000E14\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR2);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR2, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR2 is defined as MSR_R0_PMON_CTR2 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR2 0x00000E15\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL3);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL3 is defined as MSR_R0_PMON_EVNT_SEL3 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL3 0x00000E16\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR3);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR3, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR3 is defined as MSR_R0_PMON_CTR3 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR3 0x00000E17\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL4);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL4 is defined as MSR_R0_PMON_EVNT_SEL4 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL4 0x00000E18\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR4);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR4 is defined as MSR_R0_PMON_CTR4 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR4 0x00000E19\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL5);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL5 is defined as MSR_R0_PMON_EVNT_SEL5 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL5 0x00000E1A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR5);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR5 is defined as MSR_R0_PMON_CTR5 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR5 0x00000E1B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL6);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL6, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL6 is defined as MSR_R0_PMON_EVNT_SEL6 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL6 0x00000E1C\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR6);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR6, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR6 is defined as MSR_R0_PMON_CTR6 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR6 0x00000E1D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL7);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL7, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_EVNT_SEL7 is defined as MSR_R0_PMON_EVNT_SEL7 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_EVNT_SEL7 0x00000E1E\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR7);\r
AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR7, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R0_PMON_CTR7 is defined as MSR_R0_PMON_CTR7 in SDM.\r
**/\r
#define MSR_NEHALEM_R0_PMON_CTR7 0x00000E1F\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_BOX_CTRL is defined as MSR_R1_PMON_BOX_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_BOX_CTRL 0x00000E20\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_STATUS);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_STATUS, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_BOX_STATUS is defined as MSR_R1_PMON_BOX_STATUS in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_BOX_STATUS 0x00000E21\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL is defined as MSR_R1_PMON_BOX_OVF_CTRL in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL 0x00000E22\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P8);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P8, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P8 is defined as MSR_R1_PMON_IPERF1_P8 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P8 0x00000E24\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P9);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P9, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P9 is defined as MSR_R1_PMON_IPERF1_P9 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P9 0x00000E25\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P10);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P10, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P10 is defined as MSR_R1_PMON_IPERF1_P10 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P10 0x00000E26\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P11);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P11, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P11 is defined as MSR_R1_PMON_IPERF1_P11 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P11 0x00000E27\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P12);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P12, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P12 is defined as MSR_R1_PMON_IPERF1_P12 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P12 0x00000E28\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P13);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P13, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P13 is defined as MSR_R1_PMON_IPERF1_P13 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P13 0x00000E29\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P14);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P14, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P14 is defined as MSR_R1_PMON_IPERF1_P14 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P14 0x00000E2A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P15);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P15, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_IPERF1_P15 is defined as MSR_R1_PMON_IPERF1_P15 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_IPERF1_P15 0x00000E2B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P4);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P4, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_QLX_P4 is defined as MSR_R1_PMON_QLX_P4 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_QLX_P4 0x00000E2C\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P5);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P5, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_QLX_P5 is defined as MSR_R1_PMON_QLX_P5 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_QLX_P5 0x00000E2D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P6);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P6, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_QLX_P6 is defined as MSR_R1_PMON_QLX_P6 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_QLX_P6 0x00000E2E\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P7);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P7, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_QLX_P7 is defined as MSR_R1_PMON_QLX_P7 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_QLX_P7 0x00000E2F\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL8);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL8, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL8 is defined as MSR_R1_PMON_EVNT_SEL8 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL8 0x00000E30\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR8);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR8, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR8 is defined as MSR_R1_PMON_CTR8 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR8 0x00000E31\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL9);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL9, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL9 is defined as MSR_R1_PMON_EVNT_SEL9 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL9 0x00000E32\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR9);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR9, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR9 is defined as MSR_R1_PMON_CTR9 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR9 0x00000E33\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL10);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL10, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL10 is defined as MSR_R1_PMON_EVNT_SEL10 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL10 0x00000E34\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR10);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR10, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR10 is defined as MSR_R1_PMON_CTR10 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR10 0x00000E35\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL11);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL11, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL11 is defined as MSR_R1_PMON_EVNT_SEL11 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL11 0x00000E36\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR11);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR11, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR11 is defined as MSR_R1_PMON_CTR11 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR11 0x00000E37\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL12);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL12, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL12 is defined as MSR_R1_PMON_EVNT_SEL12 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL12 0x00000E38\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR12);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR12, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR12 is defined as MSR_R1_PMON_CTR12 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR12 0x00000E39\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL13);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL13, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL13 is defined as MSR_R1_PMON_EVNT_SEL13 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL13 0x00000E3A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR13);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR13, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR13 is defined as MSR_R1_PMON_CTR13 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR13 0x00000E3B\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL14);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL14, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL14 is defined as MSR_R1_PMON_EVNT_SEL14 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL14 0x00000E3C\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR14);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR14, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR14 is defined as MSR_R1_PMON_CTR14 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR14 0x00000E3D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL15);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL15, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_EVNT_SEL15 is defined as MSR_R1_PMON_EVNT_SEL15 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_EVNT_SEL15 0x00000E3E\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR15);\r
AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR15, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_R1_PMON_CTR15 is defined as MSR_R1_PMON_CTR15 in SDM.\r
**/\r
#define MSR_NEHALEM_R1_PMON_CTR15 0x00000E3F\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_MATCH is defined as MSR_B0_PMON_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_MATCH 0x00000E45\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B0_PMON_MASK is defined as MSR_B0_PMON_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_B0_PMON_MASK 0x00000E46\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_MATCH is defined as MSR_S0_PMON_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_MATCH 0x00000E49\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S0_PMON_MASK is defined as MSR_S0_PMON_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_S0_PMON_MASK 0x00000E4A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_MATCH is defined as MSR_B1_PMON_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_MATCH 0x00000E4D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_B1_PMON_MASK is defined as MSR_B1_PMON_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_B1_PMON_MASK 0x00000E4E\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MM_CONFIG);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MM_CONFIG, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_MM_CONFIG is defined as MSR_M0_PMON_MM_CONFIG in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_MM_CONFIG 0x00000E54\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_ADDR_MATCH is defined as MSR_M0_PMON_ADDR_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_ADDR_MATCH 0x00000E55\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M0_PMON_ADDR_MASK is defined as MSR_M0_PMON_ADDR_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_M0_PMON_ADDR_MASK 0x00000E56\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_MATCH is defined as MSR_S1_PMON_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_MATCH 0x00000E59\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_S1_PMON_MASK is defined as MSR_S1_PMON_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_S1_PMON_MASK 0x00000E5A\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MM_CONFIG);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MM_CONFIG, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_MM_CONFIG is defined as MSR_M1_PMON_MM_CONFIG in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_MM_CONFIG 0x00000E5C\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MATCH);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MATCH, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_ADDR_MATCH is defined as MSR_M1_PMON_ADDR_MATCH in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_ADDR_MATCH 0x00000E5D\r
\r
Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MASK);\r
AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MASK, Msr);\r
@endcode\r
+ @note MSR_NEHALEM_M1_PMON_ADDR_MASK is defined as MSR_M1_PMON_ADDR_MASK in SDM.\r
**/\r
#define MSR_NEHALEM_M1_PMON_ADDR_MASK 0x00000E5E\r
\r
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