DynamicTablesPkg: Update ArmNameSpaceObjects for IORT Rev E.d

Bugzilla: 3458 - Add support IORT Rev E.d specification updates
          (https://bugzilla.tianocore.org/show_bug.cgi?id=3458)

The IO Remapping Table, Platform Design Document, Revision E.d,
    Feb 2022 (https://developer.arm.com/documentation/den0049/)
    introduces the following updates, collectively including the
    updates and errata fixes to Rev E, Rev E.a, Rev E.b, Rev E.c:
     - increments the IORT table revision to 5.
     - updates the node definition to add an 'Identifier' field.
     - adds definition of node type 6 - Reserved Memory Range node.
     - adds definition for Memory Range Descriptors.
     - adds flag to indicate PRI support for root complexes.
     - adds flag to indicate if the root complex supports forwarding
       of PASID information on translated transactions to the SMMU.
     - adds flag to indicate if the root complex supports PASID.
     - adds flags to define access privilege and attributes for the
       memory ranges.

Therefore, update the Arm namespace objects to:
  - add Identifier field to IORT nodes.
  - introduce enums to represent RMR nodes and Memory Range
    descriptors.
  - add definition of node type 6 - Reserved Memory Range node.
  - add definition for Memory Range Descriptors.
  - add PASID capabilities and flags field to Root Complex node.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>

diff --git a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
index bfa282926e48c79ea748b12dee19a322197eaed1..5addf8626841fe35dd0d499a277cb7308787fee0 100644 (file)
--- a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
+++ b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
@@ -108,6 +108,7 @@
            "lgreater",\r
            "lless",\r
            "MPIDR",\r
+           "PASID",\r
            "PERIPHBASE",\r
            "phandle",\r
            "pytool",\r

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index 91bef9bccd1978b0e396f423cff81e621b05e0ea..102e0f96beb22cc2b93c1525bef62cd4173774eb 100644 (file)
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>\r
+  Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.<BR>\r
 \r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
@@ -61,6 +61,8 @@ typedef enum ArmObjectID {
   EArmObjLpiInfo,                      ///< 37 - Lpi Info\r
   EArmObjPciAddressMapInfo,            ///< 38 - Pci Address Map Info\r
   EArmObjPciInterruptMapInfo,          ///< 39 - Pci Interrupt Map Info\r
+  EArmObjRmr,                          ///< 40 - Reserved Memory Range Node\r
+  EArmObjMemoryRangeDescriptor,        ///< 41 - Memory Range Descriptor\r
   EArmObjMax\r
 } EARM_OBJECT_ID;\r
 \r
@@ -477,6 +479,9 @@ typedef struct CmArmItsGroupNode {
   UINT32             ItsIdCount;\r
   /// Reference token for the ITS identifier array\r
   CM_OBJECT_TOKEN    ItsIdToken;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_ITS_GROUP_NODE;\r
 \r
 /** A structure that describes the\r
@@ -509,6 +514,9 @@ typedef struct CmArmNamedComponentNode {
       the entry in the namespace for this object.\r
   */\r
   CHAR8              *ObjectName;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_NAMED_COMPONENT_NODE;\r
 \r
 /** A structure that describes the\r
@@ -537,6 +545,13 @@ typedef struct CmArmRootComplexNode {
   UINT32             PciSegmentNumber;\r
   /// Memory address size limit\r
   UINT8              MemoryAddressSize;\r
+  /// PASID capabilities\r
+  UINT16             PasidCapabilities;\r
+  /// Flags\r
+  UINT32             Flags;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_ROOT_COMPLEX_NODE;\r
 \r
 /** A structure that describes the\r
@@ -579,6 +594,9 @@ typedef struct CmArmSmmuV1SmmuV2Node {
   UINT32             SMMU_NSgCfgIrpt;\r
   /// SMMU_NSgCfgIrpt interrupt flags\r
   UINT32             SMMU_NSgCfgIrptFlags;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_SMMUV1_SMMUV2_NODE;\r
 \r
 /** A structure that describes the\r
@@ -615,6 +633,9 @@ typedef struct CmArmSmmuV3Node {
   UINT32             ProximityDomain;\r
   /// Index into the array of ID mapping\r
   UINT32             DeviceIdMappingIndex;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_SMMUV3_NODE;\r
 \r
 /** A structure that describes the\r
@@ -639,6 +660,9 @@ typedef struct CmArmPmcgNode {
 \r
   /// Reference token for the IORT node associated with this node\r
   CM_OBJECT_TOKEN    ReferenceToken;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
 } CM_ARM_PMCG_NODE;\r
 \r
 /** A structure that describes the\r
@@ -1006,6 +1030,46 @@ typedef struct CmArmPciInterruptMapInfo {
   CM_ARM_GENERIC_INTERRUPT    IntcInterrupt;\r
 } CM_ARM_PCI_INTERRUPT_MAP_INFO;\r
 \r
+/** A structure that describes the\r
+    RMR node for the Platform.\r
+\r
+    ID: EArmObjRmr\r
+*/\r
+typedef struct CmArmRmrNode {\r
+  /// An unique token used to identify this object\r
+  CM_OBJECT_TOKEN    Token;\r
+  /// Number of ID mappings\r
+  UINT32             IdMappingCount;\r
+  /// Reference token for the ID mapping array\r
+  CM_OBJECT_TOKEN    IdMappingToken;\r
+\r
+  /// Unique identifier for this node.\r
+  UINT32             Identifier;\r
+\r
+  /// Reserved Memory Range flags.\r
+  UINT32             Flags;\r
+\r
+  /// Memory range descriptor count.\r
+  UINT32             MemRangeDescCount;\r
+  /// Reference token for the Memory Range descriptor array\r
+  CM_OBJECT_TOKEN    MemRangeDescToken;\r
+} CM_ARM_RMR_NODE;\r
+\r
+/** A structure that describes the\r
+    Memory Range descriptor.\r
+\r
+    ID: EArmObjMemoryRangeDescriptor\r
+*/\r
+typedef struct CmArmRmrDescriptor {\r
+  /// Base address of Reserved Memory Range,\r
+  /// aligned to a page size of 64K.\r
+  UINT64    BaseAddress;\r
+\r
+  /// Length of the Reserved Memory range.\r
+  /// Must be a multiple of the page size of 64K.\r
+  UINT64    Length;\r
+} CM_ARM_MEMORY_RANGE_DESCRIPTOR;\r
+\r
 #pragma pack()\r
 \r
 #endif // ARM_NAMESPACE_OBJECTS_H_\r