]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdePkg/Register/Amd: realign macros with more space for future expansion
authorBrijesh Singh <brijesh.singh@amd.com>
Wed, 19 May 2021 18:19:38 +0000 (13:19 -0500)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Sat, 29 May 2021 12:15:21 +0000 (12:15 +0000)
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of the GHCB spec introduces several new SNP-specific NAEs.
Unfortunately, the names for those NAEs break the alignment. Add some
white spaces so that the SNP support patches do not break the alignment.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-3-brijesh.singh@amd.com>

MdePkg/Include/Register/Amd/Fam17Msr.h
MdePkg/Include/Register/Amd/Ghcb.h

index 716d52fd508d8c4df4e69490d2c200ded6c2a3f3..7368ce7af02acda4bfa975b46e39e8f1bd3f2b62 100644 (file)
@@ -53,11 +53,11 @@ typedef union {
   UINT64  GhcbPhysicalAddress;\r
 } MSR_SEV_ES_GHCB_REGISTER;\r
 \r
-#define GHCB_INFO_SEV_INFO                 1\r
-#define GHCB_INFO_SEV_INFO_GET             2\r
-#define GHCB_INFO_CPUID_REQUEST            4\r
-#define GHCB_INFO_CPUID_RESPONSE           5\r
-#define GHCB_INFO_TERMINATE_REQUEST        256\r
+#define GHCB_INFO_SEV_INFO                          1\r
+#define GHCB_INFO_SEV_INFO_GET                      2\r
+#define GHCB_INFO_CPUID_REQUEST                     4\r
+#define GHCB_INFO_CPUID_RESPONSE                    5\r
+#define GHCB_INFO_TERMINATE_REQUEST                 256\r
 \r
 #define GHCB_TERMINATE_GHCB                0\r
 #define GHCB_TERMINATE_GHCB_GENERAL        0\r
index ccdb662af7a7e7ae469863edfba8f1ebc70a3a54..712dc8e769c03bc09d5884e00e0d6102672b7707 100644 (file)
 //\r
 // VMG Special Exit Codes\r
 //\r
-#define SVM_EXIT_MMIO_READ      0x80000001ULL\r
-#define SVM_EXIT_MMIO_WRITE     0x80000002ULL\r
-#define SVM_EXIT_NMI_COMPLETE   0x80000003ULL\r
-#define SVM_EXIT_AP_RESET_HOLD  0x80000004ULL\r
-#define SVM_EXIT_AP_JUMP_TABLE  0x80000005ULL\r
-#define SVM_EXIT_UNSUPPORTED    0x8000FFFFULL\r
+#define SVM_EXIT_MMIO_READ                      0x80000001ULL\r
+#define SVM_EXIT_MMIO_WRITE                     0x80000002ULL\r
+#define SVM_EXIT_NMI_COMPLETE                   0x80000003ULL\r
+#define SVM_EXIT_AP_RESET_HOLD                  0x80000004ULL\r
+#define SVM_EXIT_AP_JUMP_TABLE                  0x80000005ULL\r
+#define SVM_EXIT_UNSUPPORTED                    0x8000FFFFULL\r
 \r
 //\r
 // IOIO Exit Information\r