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31 ;;; gf_3vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
34 %include "reg_sizes.asm"
36 %ifidn __OUTPUT_FORMAT__, elf64
46 %define tmp3 r13 ; must be saved and restored
47 %define tmp4 r12 ; must be saved and restored
55 %define func(x) x: endbranch
66 %ifidn __OUTPUT_FORMAT__, win64
72 %define arg4 r12 ; must be saved, loaded and restored
73 %define arg5 r15 ; must be saved and restored
76 %define tmp3 r13 ; must be saved and restored
77 %define tmp4 r14 ; must be saved and restored
84 %define stack_size 6*16 + 5*8 ; must be an odd multiple of 8
85 %define arg(x) [rsp + stack_size + PS + PS*x]
87 %define func(x) proc_frame x
89 alloc_stack stack_size
90 vmovdqa [rsp + 0*16], xmm6
91 vmovdqa [rsp + 1*16], xmm7
92 vmovdqa [rsp + 2*16], xmm8
93 vmovdqa [rsp + 3*16], xmm9
94 vmovdqa [rsp + 4*16], xmm10
95 vmovdqa [rsp + 5*16], xmm11
96 save_reg r12, 6*16 + 0*8
97 save_reg r13, 6*16 + 1*8
98 save_reg r14, 6*16 + 2*8
99 save_reg r15, 6*16 + 3*8
104 %macro FUNC_RESTORE 0
105 vmovdqa xmm6, [rsp + 0*16]
106 vmovdqa xmm7, [rsp + 1*16]
107 vmovdqa xmm8, [rsp + 2*16]
108 vmovdqa xmm9, [rsp + 3*16]
109 vmovdqa xmm10, [rsp + 4*16]
110 vmovdqa xmm11, [rsp + 5*16]
111 mov r12, [rsp + 6*16 + 0*8]
112 mov r13, [rsp + 6*16 + 1*8]
113 mov r14, [rsp + 6*16 + 2*8]
114 mov r15, [rsp + 6*16 + 3*8]
119 %ifidn __OUTPUT_FORMAT__, elf32
121 ;;;================== High Address;
128 ;;;<================= esp of caller
130 ;;;<================= ebp = esp
136 ;;;<================= esp of callee
138 ;;;================== Low Address;
142 %define func(x) x: endbranch
143 %define arg(x) [ebp + PS*2 + PS*x]
144 %define var(x) [ebp - PS - PS*x]
148 %define arg0 trans ;trans and trans2 are for the variables in stack
149 %define arg0_m arg(0)
152 %define arg2_m arg(2)
154 %define arg3_m arg(3)
156 %define arg4_m arg(4)
161 %define tmp3_m var(0)
163 %define tmp4_m var(1)
165 %macro SLDR 2 ;; stack load/restore
173 sub esp, PS*2 ;2 local variables
180 %macro FUNC_RESTORE 0
184 add esp, PS*2 ;2 local variables
188 %endif ; output formats
192 %define mul_array arg2
202 %ifidn PS,4 ;32-bit code
205 %define dest1_m arg4_m
206 %define dest2_m tmp3_m
207 %define dest3_m tmp4_m
210 %ifndef EC_ALIGNED_ADDR
211 ;;; Use Un-aligned load/store
215 ;;; Use Non-temporal load/stor
220 %define XLDR vmovntdqa
221 %define XSTR vmovntdq
225 %ifidn PS,8 ; 64-bit code
233 %ifidn PS,8 ;64-bit code
234 %define xmask0f xmm11
235 %define xgft1_lo xmm10
236 %define xgft1_hi xmm9
237 %define xgft2_lo xmm8
238 %define xgft2_hi xmm7
239 %define xgft3_lo xmm6
240 %define xgft3_hi xmm5
249 %define xgft1_lo xmm6
250 %define xgft1_hi xmm5
251 %define xgft2_lo xgft1_lo
252 %define xgft2_hi xgft1_hi
253 %define xgft3_lo xgft1_lo
254 %define xgft3_hi xgft1_hi
264 mk_global gf_3vect_dot_prod_avx, function
265 func(gf_3vect_dot_prod_avx)
272 vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
273 sal vec, LOG_PS ;vec *= PS. Make vec_i count by PS
275 mov dest2, [dest1+PS]
277 mov dest3, [dest1+2*PS]
293 vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
294 vmovdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, ..., Ax{f0}
295 %ifidn PS,8 ; 64-bit code
296 vmovdqu xgft2_lo, [tmp+vec*(32/PS)] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
297 vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16] ; " Bx{00}, Bx{10}, ..., Bx{f0}
298 vmovdqu xgft3_lo, [tmp+vec*(64/PS)] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
299 vmovdqu xgft3_hi, [tmp+vec*(64/PS)+16] ; " Cx{00}, Cx{10}, ..., Cx{f0}
303 XLDR x0, [ptr+pos] ;Get next source vector
305 vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
306 vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
307 vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
309 vpshufb xgft1_hi, x0 ;Lookup mul table of high nibble
310 vpshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
311 vpxor xgft1_hi, xgft1_lo ;GF add high and low partials
312 vpxor xp1, xgft1_hi ;xp1 += partial
314 %ifidn PS,4 ; 32-bit code
315 vmovdqu xgft2_lo, [tmp+vec*(32/PS)] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
316 vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16] ; " Bx{00}, Bx{10}, ..., Bx{f0}
318 vpshufb xgft2_hi, x0 ;Lookup mul table of high nibble
319 vpshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
320 vpxor xgft2_hi, xgft2_lo ;GF add high and low partials
321 vpxor xp2, xgft2_hi ;xp2 += partial
323 %ifidn PS,4 ; 32-bit code
325 vmovdqu xgft3_lo, [tmp+vec*(32/PS)] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
326 vmovdqu xgft3_hi, [tmp+vec*(32/PS)+16] ; " Cx{00}, Cx{10}, ..., Cx{f0}
331 vpshufb xgft3_hi, x0 ;Lookup mul table of high nibble
332 vpshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
333 vpxor xgft3_hi, xgft3_lo ;GF add high and low partials
334 vpxor xp3, xgft3_hi ;xp3 += partial
341 XSTR [dest1+pos], xp1
342 XSTR [dest2+pos], xp2
344 XSTR [dest3+pos], xp3
347 add pos, 16 ;Loop on 16 bytes at a time
356 mov pos, len ;Overlapped offset length-16
357 jmp .loop16 ;Do one more overlap pass
374 mask0f: dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
376 ;;; func core, ver, snum
377 slversion gf_3vect_dot_prod_avx, 02, 05, 0192