1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 ; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
4 ; Redistribution and use in source and binary forms, with or without
5 ; modification, are permitted provided that the following conditions
7 ; * Redistributions of source code must retain the above copyright
8 ; notice, this list of conditions and the following disclaimer.
9 ; * Redistributions in binary form must reproduce the above copyright
10 ; notice, this list of conditions and the following disclaimer in
11 ; the documentation and/or other materials provided with the
13 ; * Neither the name of Intel Corporation nor the names of its
14 ; contributors may be used to endorse or promote products derived
15 ; from this software without specific prior written permission.
17 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
31 ;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
34 %include "reg_sizes.asm"
37 %ifidn __OUTPUT_FORMAT__, win64
48 %define stack_size 16*10 + 3*8
49 %define arg(x) [rsp + stack_size + PS + PS*x]
50 %define func(x) proc_frame x
54 movdqa [rsp+16*0],xmm6
55 movdqa [rsp+16*1],xmm7
56 movdqa [rsp+16*2],xmm8
57 movdqa [rsp+16*3],xmm9
58 movdqa [rsp+16*4],xmm10
59 movdqa [rsp+16*5],xmm11
60 movdqa [rsp+16*6],xmm12
61 movdqa [rsp+16*7],xmm13
62 movdqa [rsp+16*8],xmm14
63 movdqa [rsp+16*9],xmm15
64 save_reg r12, 10*16 + 0*8
65 save_reg r15, 10*16 + 1*8
72 movdqa xmm6, [rsp+16*0]
73 movdqa xmm7, [rsp+16*1]
74 movdqa xmm8, [rsp+16*2]
75 movdqa xmm9, [rsp+16*3]
76 movdqa xmm10, [rsp+16*4]
77 movdqa xmm11, [rsp+16*5]
78 movdqa xmm12, [rsp+16*6]
79 movdqa xmm13, [rsp+16*7]
80 movdqa xmm14, [rsp+16*8]
81 movdqa xmm15, [rsp+16*9]
82 mov r12, [rsp + 10*16 + 0*8]
83 mov r15, [rsp + 10*16 + 1*8]
87 %elifidn __OUTPUT_FORMAT__, elf64
104 ;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
109 %define mul_array arg3
113 %define pos.w return.w
115 %define dest2 mul_array
118 %ifndef EC_ALIGNED_ADDR
119 ;;; Use Un-aligned load/store
123 ;;; Use Non-temporal load/stor
128 %define XLDR movntdqa
138 %define xmask0f xmm15
139 %define xgft1_lo xmm14
140 %define xgft1_hi xmm13
141 %define xgft2_lo xmm12
142 %define xgft2_hi xmm11
143 %define xgft3_lo xmm10
144 %define xgft3_hi xmm9
159 global gf_3vect_mad_sse:ISAL_SYM_TYPE_FUNCTION
160 func(gf_3vect_mad_sse)
165 movdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
166 sal vec_i, 5 ;Multiply by 32
168 lea tmp, [mul_array + vec_i]
170 movdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
171 movdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
172 movdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
173 movdqu xgft2_hi, [tmp+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
174 movdqu xgft3_lo, [tmp+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
175 movdqu xgft3_hi, [tmp+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
176 mov dest2, [dest1+PS] ; reuse mul_array
177 mov dest3, [dest1+2*PS] ; reuse vec_i
181 XLDR x0, [src+pos] ;Get next source vector
182 movdqa xtmph1, xgft1_hi ;Reload const array registers
183 movdqa xtmpl1, xgft1_lo
184 movdqa xtmph2, xgft2_hi ;Reload const array registers
185 movdqa xtmpl2, xgft2_lo
186 movdqa xtmph3, xgft3_hi ;Reload const array registers
187 movdqa xtmpl3, xgft3_lo
189 XLDR xd1, [dest1+pos] ;Get next dest vector
191 movdqa xtmpa, x0 ;Keep unshifted copy of src
192 psraw x0, 4 ;Shift to put high nibble into bits 4-0
193 pand x0, xmask0f ;Mask high src nibble in bits 4-0
194 pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
197 pshufb xtmph1, x0 ;Lookup mul table of high nibble
198 pshufb xtmpl1, xtmpa ;Lookup mul table of low nibble
199 pxor xtmph1, xtmpl1 ;GF add high and low partials
202 XLDR xd2, [dest2+pos] ;reuse xtmpl1. Get next dest vector
203 XLDR xd3, [dest3+pos] ;reuse xtmph1. Get next dest vector
206 pshufb xtmph2, x0 ;Lookup mul table of high nibble
207 pshufb xtmpl2, xtmpa ;Lookup mul table of low nibble
208 pxor xtmph2, xtmpl2 ;GF add high and low partials
212 pshufb xtmph3, x0 ;Lookup mul table of high nibble
213 pshufb xtmpl3, xtmpa ;Lookup mul table of low nibble
214 pxor xtmph3, xtmpl3 ;GF add high and low partials
217 XSTR [dest1+pos], xd1 ;Store result
218 XSTR [dest2+pos], xd2 ;Store result
219 XSTR [dest3+pos], xd3 ;Store result
221 add pos, 16 ;Loop on 16 bytes at a time
231 ;; Do one more overlap pass
232 mov tmp, len ;Overlapped offset length-16
234 XLDR x0, [src+tmp] ;Get next source vector
235 XLDR xd1, [dest1+tmp] ;Get next dest vector
236 XLDR xd2, [dest2+tmp] ;reuse xtmpl1. Get next dest vector
237 XLDR xd3, [dest3+tmp] ;reuse xtmph1. Get next dest vector
241 movdqa xtmph3, [constip16] ;Load const of i + 16
242 pinsrb xtmpl3, len.w, 15
243 pshufb xtmpl3, xmask0f ;Broadcast len to all bytes
244 pcmpgtb xtmpl3, xtmph3
246 movdqa xtmpa, x0 ;Keep unshifted copy of src
247 psraw x0, 4 ;Shift to put high nibble into bits 4-0
248 pand x0, xmask0f ;Mask high src nibble in bits 4-0
249 pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
252 pshufb xgft1_hi, x0 ;Lookup mul table of high nibble
253 pshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
254 pxor xgft1_hi, xgft1_lo ;GF add high and low partials
255 pand xgft1_hi, xtmpl3
259 pshufb xgft2_hi, x0 ;Lookup mul table of high nibble
260 pshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
261 pxor xgft2_hi, xgft2_lo ;GF add high and low partials
262 pand xgft2_hi, xtmpl3
266 pshufb xgft3_hi, x0 ;Lookup mul table of high nibble
267 pshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
268 pxor xgft3_hi, xgft3_lo ;GF add high and low partials
269 pand xgft3_hi, xtmpl3
272 XSTR [dest1+tmp], xd1 ;Store result
273 XSTR [dest2+tmp], xd2 ;Store result
274 XSTR [dest3+tmp], xd3 ;Store result
293 dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
295 dq 0xf8f9fafbfcfdfeff, 0xf0f1f2f3f4f5f6f7
297 ;;; func core, ver, snum
298 slversion gf_3vect_mad_sse, 00, 01, 0206