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[ceph.git] / ceph / src / isa-l / igzip / igzip_deflate_hash.asm
1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 ; Copyright(c) 2011-2018 Intel Corporation All rights reserved.
3 ;
4 ; Redistribution and use in source and binary forms, with or without
5 ; modification, are permitted provided that the following conditions
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7 ; * Redistributions of source code must retain the above copyright
8 ; notice, this list of conditions and the following disclaimer.
9 ; * Redistributions in binary form must reproduce the above copyright
10 ; notice, this list of conditions and the following disclaimer in
11 ; the documentation and/or other materials provided with the
12 ; distribution.
13 ; * Neither the name of Intel Corporation nor the names of its
14 ; contributors may be used to endorse or promote products derived
15 ; from this software without specific prior written permission.
16 ;
17 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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23 ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
29
30 %include "options.asm"
31 %include "lz0a_const.asm"
32 %include "data_struct2.asm"
33 %include "huffman.asm"
34 %include "reg_sizes.asm"
35
36 %define DICT_SLOP 8
37 %define DICT_END_SLOP 4
38
39 %ifidn __OUTPUT_FORMAT__, win64
40 %define arg1 rcx
41 %define arg2 rdx
42 %define arg3 r8
43 %define arg4 r9
44 %define arg5 rdi
45 %define swap1 rsi
46 %define stack_size 3 * 8
47 %define PS 8
48 %define arg(x) [rsp + stack_size + PS*x]
49 %else
50 %define arg1 rdi
51 %define arg2 rsi
52 %define arg3 rdx
53 %define arg4 rcx
54 %define arg5 r8
55 %define swap1 r9
56 %endif
57
58 %define hash_table arg1
59
60 %define hash_mask arg2
61
62 %define f_i_end arg3
63
64 %define dict_offset arg4
65
66 %define dict_len arg5
67 %define f_i arg5
68
69 %define f_i_tmp rax
70
71 %define hash swap1
72
73 %define hash2 r10
74
75 %define hash3 r11
76
77 %define hash4 r12
78
79
80 %macro FUNC_SAVE 0
81 %ifidn __OUTPUT_FORMAT__, win64
82 push rsi
83 push rdi
84 push r12
85 mov arg5 %+ d, arg(5)
86 %else
87 push r12
88 %endif
89 %endm
90
91 %macro FUNC_RESTORE 0
92 %ifidn __OUTPUT_FORMAT__, win64
93 pop r12
94 pop rdi
95 pop rsi
96 %else
97 pop r12
98 %endif
99 %endm
100
101 global isal_deflate_hash_crc_01
102 isal_deflate_hash_crc_01:
103 FUNC_SAVE
104
105 neg f_i
106 add f_i, f_i_end
107
108 sub dict_offset, f_i
109
110 sub f_i_end, DICT_SLOP
111 cmp f_i, f_i_end
112 jg end_main
113
114 main_loop:
115 lea f_i_tmp, [f_i + 2]
116
117 xor hash, hash
118 crc32 hash %+ d, dword [f_i + dict_offset]
119
120 xor hash2, hash2
121 crc32 hash2 %+ d, dword [f_i + dict_offset + 1]
122
123 xor hash3, hash3
124 crc32 hash3 %+ d, dword [f_i_tmp + dict_offset]
125
126 xor hash4, hash4
127 crc32 hash4 %+ d, dword [f_i_tmp + dict_offset + 1]
128
129 and hash, hash_mask
130 and hash2, hash_mask
131 and hash3, hash_mask
132 and hash4, hash_mask
133
134 mov [hash_table + 2 * hash], f_i %+ w
135 add f_i, 1
136
137 mov [hash_table + 2 * hash2], f_i %+ w
138 add f_i, 3
139
140 mov [hash_table + 2 * hash3], f_i_tmp %+ w
141 add f_i_tmp, 1
142
143 mov [hash_table + 2 * hash4], f_i_tmp %+ w
144
145 cmp f_i, f_i_end
146 jle main_loop
147
148 end_main:
149 add f_i_end, DICT_SLOP - DICT_END_SLOP
150 cmp f_i, f_i_end
151 jg end
152
153 end_loop:
154 xor hash, hash
155 crc32 hash %+ d, dword [f_i + dict_offset]
156
157 and hash, hash_mask
158 mov [hash_table + 2 * hash], f_i %+ w
159
160 add f_i, 1
161 cmp f_i, f_i_end
162 jle end_loop
163 end:
164 FUNC_RESTORE
165 ret